Prof. Renau area of research is computer architecture, focusing on productive hardware design flows (Live Hardware Design Flow or LiveHD, architectural simulators like ESESC, new hardware description language like Pyrope, new design methodologies like Fluid Pipelines), out-of-order cores, and RISC-V verification. Past projects with Thread Level Speculation, infrared thermal measurements and power modeling, and design effort metrics/models. Prof. Renau has a PhD in Computer Science from the University of Illinois at Urbana-Champaign. He is currently the IEEE TCMM Chair.