conf.researchr.org / Jiaxin Liu
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Name:Jiaxin Liu
Affiliation:Tsinghua University
Contributions
2026
HPCA
- Author of TEMP: A Memory Efficient Physical-aware Tensor Partition-Mapping Framework on Wafer-scale Chips within the Main Conference-track
- Author of FACE: Fully PD Overlapped Scheduling and Multi-Level Architecture Co-Exploration on Wafer within the Main Conference-track
- Author of ReThermal: Co-Design of Thermal-Aware Static and Dynamic Scheduling for LLM Training on Liquid-Cooled Wafer-Scale Chips within the Main Conference-track
- Author of MoEntwine: Unleashing the Potential of Wafer-scale Chips for Large-scale Expert Parallel Inference within the Main Conference-track