You're viewing the program in a time zone which is different from your device's time zone change time zone

Sat 17 Jun

Displayed time zone: Eastern Time (US & Canada) change

09:00 - 11:00
PLARCH: Session 1PLARCH at Magnolia 4
Chair(s): Adam Chlipala Massachusetts Institute of Technology

#plarch-sat-magnolia4 Discord icon small YouTube icon small

09:00
15m
Talk
Goals for a modern ISA specification
PLARCH
09:25
15m
Talk
Generate Compilers from Hardware Models!
PLARCH
Gus Henry Smith University of Washington, Benjamin Kushigian University of Washington, Vishal Canumalla University of Washington, Andrew Cheung University of Washington, René Just University of Washington, Zachary Tatlock University of Washington
09:40
10m
Talk
Semi-Automated Translation of a Formal ISA Specification to Hardware
PLARCH
Harlan Kringen UC Santa Barbara, Zachary Sisco UC Santa Barbara, Jonathan Balkind UC Santa Barbara, Timothy Sherwood University of California at Santa Barbara, Ben Hardekopf University of California at Santa Barbara
File Attached
10:00
15m
Talk
Leakage models are a leaky abstraction: the case for cycle-level verification of constant-time cryptography
PLARCH
Anish Athalye MIT, M. Frans Kaashoek Massachusetts Institute of Technology, USA, Nickolai Zeldovich Massachusetts Institute of Technology, USA, Joseph Tassarotti NYU
Pre-print
10:15
15m
Talk
Hardware-Software Codesign for Mitigating Spectre
PLARCH
Nicholas Mosier Stanford University, Kate Eselius Stanford University, Hamed Nemati Stanford University, CISPA Helmholtz Center for Information Security, John C. Mitchell Stanford University, Caroline Trippel Stanford University
File Attached
10:30
15m
Talk
Hardware Verification of Timing Side Channel Freedom in the Spectre Era
PLARCH
Stella Lau MIT CSAIL, Thomas Bourgeat MIT CSAIL, Clément Pit-Claudel EPFL / AWS, Adam Chlipala Massachusetts Institute of Technology
11:20 - 12:30
PLARCH: Session 2PLARCH at Magnolia 4
Chair(s): Mengjia Yan MIT

#plarch-sat-magnolia4 Discord icon small YouTube icon small

11:20
10m
Talk
Tags: A Framework for Distributed Event Ordering
PLARCH
Paul Mure Stanford University, Nathan Zhang Stanford University, Caroline Trippel Stanford University, Kunle Olukotun Stanford University
11:30
15m
Talk
Stellar: A DSL to Build and Explore Sparse Accelerators
PLARCH
Hasan Genc UC Berkeley, Hansung Kim University of California, Berkeley, Prashanth Ganesh University of California, Berkeley, Yakun Sophia Shao University of California, Berkeley
11:45
15m
Talk
PEak: A Single Source of Truth for Hardware Design and Verification
PLARCH
Caleb Donovick Stanford University, Ross Daly Stanford University, USA, Jackson Melchert Stanford University, Leonard Truong Stanford University, Priyanka Raina Stanford University, Pat Hanrahan Stanford University, USA, Clark Barrett Stanford University
12:00
10m
Talk
Challenges with Hardware-Software Co-design for Sparse Machine Learning on Streaming Dataflow
PLARCH
Rubens Lacouture Stanford University, Olivia Hsu Stanford University, Kunle Olukotun Stanford University, Fredrik Kjolstad Stanford University
14:00 - 15:30
PLARCH: Session 3PLARCH at Magnolia 4
Chair(s): Caroline Trippel Stanford University

#plarch-sat-magnolia4 Discord icon small YouTube icon small

14:00
15m
Talk
They're the same picture: a software-verification flow adapted for hardware verification
PLARCH
Andreas Lööw Imperial College London, Magnus O. Myreen Chalmers University of Technology
Pre-print
14:15
15m
Talk
Design for Hardware Memory Model Verification
PLARCH
Yao Hsiao Stanford University, Yasas Seneviratne University of Virginia, Tommy Tracy II University of Virginia, Kevin Skadron University of Virginia, Caroline Trippel Stanford University
File Attached
14:40
10m
Talk
Nerv: Probabilistic Dynamic Partial Order Reduction for Hardware
PLARCH
Tianrui Wei University of California, Berkeley, Shangyin Tan University of California at Berkeley, Koushik Sen University of California at Berkeley, Krste Asanovic University of California Berkeley
14:50
10m
Talk
NFC:Next-generation Formal verification for high performance Caches
PLARCH
Tianrui Wei University of California, Berkeley, Jerry Zhao UC Berkeley, Krste Asanovic University of California Berkeley
15:00
10m
Talk
Sandia's Formal Hardware Design and Verification, Present and Future
PLARCH
Noah Evans Sandia National Laboratories
15:10
10m
Talk
Silver Oak: Hardware Software Co-Design and Co-Verification in Coq
PLARCH
Ben Blaxill Groq, Samuel Grütter Massachusetts Institute of Technology, Jade Philipoom Google, Germany, Satnam Singh Groq
16:00 - 17:50
PLARCH: Session 4PLARCH at Magnolia 4
Chair(s): Adrian Sampson Cornell University

#plarch-sat-magnolia4 Discord icon small YouTube icon small

16:00
15m
Talk
Novel Numerical Hardware Design Methodology - From machine readable specification to optimized RTL
PLARCH
Theo Drane Intel Corporation, USA, Bill Zorn Intel Corporation, USA, Samuel Coward Imperial College London, UK / Intel Corporation
File Attached
16:15
15m
Talk
Mixed-Abstraction HDLs and A Discussion on Other Aspects of HDL Design
PLARCH
Vighnesh Iyer University of California, Berkeley, Borivoje Nikolic University of California, Berkeley
File Attached
16:30
10m
Talk
New Embedded DSLs for Hardware Design and Verification
PLARCH
Vighnesh Iyer University of California, Berkeley, Kevin Laeufer UC Berkeley, Young-Jin Park University of California, Berkeley, Rohit Agarwal University of California, Berkeley, Lixiang Yin University of California, Berkeley, Bryan Ngo University of California, Berkeley, Oliver Yu University of California, Berkeley, Koushik Sen University of California at Berkeley, Borivoje Nikolic University of California, Berkeley
File Attached
16:40
10m
Talk
Fearless Hardware Design
PLARCH
Rachit Nigam Cornell University
17:00
10m
Talk
Library-based Compartmentalisation on CHERI
PLARCH
Dapeng Gao University of Cambridge, Robert N. M. Watson University of Cambridge
17:10
10m
Talk
Non-Newtonian Hardware Design for Longevity
PLARCH
Guy Wilks UC Santa Barbara, Jonathan Balkind UC Santa Barbara
17:20
10m
Talk
On the Generality of Matrix Multiplication
PLARCH
Andrew Alex UC Santa Barbara, Zachary Sisco UC Santa Barbara, Jonathan Balkind UC Santa Barbara
17:30
10m
Talk
ChatGPT, Make a Secure Malloc for me
PLARCH
Jeremy Singer University of Glasgow, Zheng Wang University of Leeds, UK
Pre-print