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CC 2017
Sun 5 - Mon 6 February 2017 Austin, Texas, United States
Sun 5 Feb 2017 11:45 - 12:10 at 404 - Concurrency & Parallelism Chair(s): Sebastian Hack

Many computationally-intensive algorithms benefit from the wide parallelism offered by Graphical Processing Units (GPUs). However, the search for a close-to-optimal implementation remains extremely tedious due to the specialization and complexity of GPU architectures.

We present a novel approach to automatically discover the best performing code from a given set of possible implementations. It involves a branch and bound algorithm with two distinctive features: (1) an analytic performance model of a \emph{lower bound} on the execution time, and (2) the ability to estimate such bounds on a \emph{partially-specified} implementation.

The unique features of this performance model allow to aggressively prune the optimization space without eliminating the best performing implementation. While the space considered in this paper focuses on GPUs, the approach is generic enough to be applied to other architectures.

We implemented our algorithm in a tool called \emph{Telamon} and demonstrate its effectiveness on a huge, architecture-specific and input-sensitive optimization space. The information provided by the performance model also helps to identify ways to enrich the search space to consider better candidates, or to highlight architectural bottlenecks.

Sun 5 Feb

10:30 - 12:10: Research Papers - Concurrency & Parallelism at 404
Chair(s): Sebastian HackSaarland University
CC-2017-papers10:30 - 10:55
Robin MorissetENS, France, Francesco Zappa NardelliInria, France
CC-2017-papers10:55 - 11:20
Swarnendu BiswasUniversity of Texas at Austin, Man CaoOhio State University, Minjia ZhangOhio State University, Michael BondOhio State University, Benjamin P. WoodWellesley College, USA
CC-2017-papers11:20 - 11:45
Jun ShirakoRice University, USA, Akihiro HayashiRice University, USA, Vivek SarkarRice University, USA
CC-2017-papers11:45 - 12:10