We present a translation from programs expressed in a functional IR into dataflow networks as an intermediate step within a Haskell-to-Hardware compiler. Our networks exploit pipeline parallelism, particularly across multiple tail-recursive calls, via non-strict function evaluation. To handle the long-latency memory operations common to our target applications, we employ a latency-insensitive methodology that ensures arbitrary delays do not change the functionality of the circuit. We present empirical results comparing our networks against their strict counterparts, showing that non-strictness can mitigate small increases in memory latency and improve overall performance by up to 2$\times$.
Sun 5 Feb
|13:30 - 13:55|
|13:55 - 14:20|
Christian Wimmer, Vojin JovanovicOracle Labs, Erik EcksteinOracle Labs, USA, Thomas WuerthingerOracle LabsDOI
|14:20 - 14:45|
Nikita PopovTU Berlin, Germany, Biagio CosenzaTU Berlin, Germany, Ben JuurlinkTU Berlin, Germany, Dmitry StogovZend Technologies, RussiaDOI
|14:45 - 15:10|