Loner: Utilizing the CPU Vector Datapath to Process Scalar Integer Data
Modern CPUs utilize SIMD vector instructions and hardware extensions to accelerate code with data-level parallelism. This allows for high performance gains in select application domains such as image and signal processing. However, general purpose code often lacks data-level parallelism or has complex control and data dependencies, which prevents vectorization. Thus, CPU vector registers and functional units frequently sit idle while the scalar datapath unilaterally executes code. In this paper, we present Loner, a profile-guided compiler methodology for optimizing scalar integer loops using the otherwise idle vector datapath. Loner expands the traditional definition of vectorization by identifying two situations where it is beneficial to perform vector operations with a single data element (“Loner” data). In the first, the scalar register file and functional units are overburdened, resulting in unnecessary spill/reload operations and stalls due to structural hazards. In the second, we describe a set of “vector-amenable” computation patterns that the vector pipeline naturally executes more efficiently than its scalar counterpart. Loner identifies hot code regions that exhibit either characteristic and offloads a subset of a program’s computation graph to the vector datapath for maximum performance. We evaluate Loner on an x86 Whiskey Lake processor using select benchmarks from the SPEC, GAP, and MiBench benchmark suites where it improves performance by 2.64% (geomean) up to 40.28%.
Wed 6 AprDisplayed time zone: Eastern Time (US & Canada) change
13:00 - 14:00 | Session 6: Performance OptimizationsCC Research Papers at CC Virtual Room Chair(s): Doru Thom Popovici Lawrence Berkeley National Lab | ||
13:00 15mPaper | Loner: Utilizing the CPU Vector Datapath to Process Scalar Integer Data CC Research Papers Armand Behroozi University of Michigan, Sunghyun Park University of Michigan, Scott Mahlke University of Michigan DOI | ||
13:15 15mPaper | Mapping Parallelism in a Functional IR through Constraint Satisfaction CC Research Papers Naums Mogers University of Edinburgh, Lu Li University of Edinburgh, Valentin Radu University of Sheffield, Christophe Dubach McGill University DOI | ||
13:30 15mPaper | Software Pre-execution for Irregular Memory Accesses in the HBM Era CC Research Papers DOI | ||
13:45 15mPaper | Efficient Profile-Guided Size Optimization for Native Mobile Applications CC Research Papers DOI |