Jeronimo Castrillon

Registered user since Mon 14 Aug 2017

Name:Jeronimo Castrillon

Jeronimo Castrillon is a professor in the Department of Computer Science at the TU Dresden, where he is also affiliated with the Center for Advancing Electronics Dresden (CfAED). He is the head of the Chair for Compiler Construction, with research focus on methodologies, languages, tools and algorithms for programming complex computing systems. He received the Electronics Engineering degree from the Pontificia Bolivariana University in Colombia in 2004, the master degree from the ALaRI Institute in Switzerland in 2006 and the Ph.D. degree (Dr.-Ing.) with honors from the RWTH Aachen University in Germany in 2013. In 2014, Prof. Castrillon co-founded Silexica GmbH/Inc, a company that provides programming tools for heterogeneous embedded multicore architectures. Prof. Castrillon is Senior Member IEEE, Member ACM and was a founding member (2017-2019) of the executive committee of the ACM “Future of Computing Academy” (FCA).

Affiliation:TU Dresden, Germany
Research interests:parallel programming, heterogeneous multicores, domain-specific languages, optimization for emerging systems


LCTES 2022 Committee Member in Program Committee within the LCTES 2022-track
COP 2022 Author of Guard the Cache: Dispatch Optimization in a Contextual Role-oriented Language within the COP 2022-track
CGO 2022 Committee Member in Program Committee within the Main Conference-track
CC 2020 Author of Compiler-Based Graph Representations for Deep Learning Models of Code within the Main Conference-track
Haskell 2019 Author of STCLang: State Thread Composition as a Foundation for Monadic Dataflow Parallelism within the Haskell 2019-track
MAPL 2019 Author of A Case Study on Machine Learning for Synthesizing Benchmarks within the MAPL 2019-track
ARRAY 2019 Author of TeIL: a type-safe imperative Tensor Intermediate Language within the ARRAY 2019-track
SLE 2019 Author of Efficient Late Binding of Dynamic Function Compositions within the SLE 2019-track
LCTES 2019 Committee Member in Program Committee within the LCTES 2019-track
Author of Optimizing Tensor Contractions for Embedded Devices with Racetrack Memory Scratch-Pads within the LCTES 2019-track
LCTES 2018 Committee Member in Program Committee
GPCE 2018 Author of Meta-programming for cross-domain tensor optimizations within the GPCE 2018-track
SPLASH 2018 Author of Meta-programming for cross-domain tensor optimizations within the Posters-track
GPCE 2017 Author of Towards Compositional and Generative Tensor Optimizations within the GPCE 2017-track
LASSY 2017 Author of Analyzing State-of-the-Art Role-based Programming Languages within the LASSY 2017-track
Modularity 2016 Author of Fault Tolerance with Aspects: A Feasibility Study within the Research Results-track
DSLDI 2015 Author of Towards a Next-Generation Parallel Particle-Mesh Language within the DSLDI-track