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Josep Torrellas
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HPCA/CGO/PPoPP/CC 2026 profile
PLDI 2019 profile
PPoPP 2023 profile
SPLASH 2018 profile
VEE 2019 profile
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Name:
Josep Torrellas
Affiliation:
University of Illinois at Urbana-Champaign
Contributions
2026
HPCA
Author of AccelFlow: Orchestrating an On-Package Ensemble of Fine-Grained Accelerators for Microservices within the Main Conference-track
Author of Supporting High-performance Write-through Cache-Coherence Protocols under TSO within the Main Conference-track
Committee Member in Program Committee
CGO
Author of GRANII: Selection and Ordering of Primitives in GRAph Neural Networks using Input Inspection within the Main Conference-track
2023
Principles and Practice of Parallel Programming
Author of WISE: Predicting the Performance of Sparse Matrix Vector Multiplication with Machine Learning within the Main Conference-track
2019
PLDI
Author of AutoPersist: An Easy-To-Use Java NVM Framework Based on Reachability within the PLDI Research Papers-track
Author of Reusable Inline Caching for JavaScript Performance within the PLDI Research Papers-track
VEE
Author of QuickCheck: Using Speculation to Reduce the Overhead of Checks in NVM Frameworks within the Research Papers-track
2018
SPLASH
Author of An Empirical Study of the Effect of Source-level Loop Transformations on Compiler Stability within the Posters-track
Author of An Empirical Study of the Effect of Source-level Loop Transformations on Compiler Stability within the OOPSLA-track
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Wed 14 Jan 17:22