Vivek Sarkar

Registered user since Fri 29 Apr 2016

Name: Vivek Sarkar

Bio: Vivek Sarkar is Professor of Computer Science and the E.D. Butcher Chair in Engineering at Rice University. He conducts research in multiple aspects of parallel software including programming languages, program analysis, compiler optimizations and runtimes systems for diverse parallel platforms. He currently leads the Habanero Extreme Scale Software Research Laboratory at Rice University, and is PI of the DARPA-funded Pliny project on “big code” analytics. Prior to joining Rice in July 2007, Vivek was Senior Manager of Programming Technologies at IBM Research. His responsibilities at IBM included leading IBM’s research efforts in programming model, tools, and productivity in the PERCS project during 2002- 2007 as part of the DARPA High Productivity Computing System program. His prior research projects include the X10 programming language, the Jikes Research Virtual Machine for the Java language, the ASTI optimizer used in IBM’s XL Fortran product compilers, the PTRAN automatic parallelization system, and profile-directed partitioning and scheduling of Sisal programs. In 1997, he was on sabbatical as a visiting associate professor at MIT, where he was a founding member of the MIT Raw multicore project. Vivek became a member of the IBM Academy of Technology in 1995, and was inducted as an ACM Fellow in 2008. He holds a B.Tech. degree from the Indian Institute of Technology, Kanpur, an M.S. degree from University of Wisconsin-Madison, and a Ph.D. from Stanford University. Vivek has been serving as a member of the US Department of Energy’s Advanced Scientific Computing Advisory Committee (ASCAC) since 2009, and on CRA’s Board of Directors since 2015.

Country: United States

Affiliation: Rice University, USA

Personal website: http://vsarkar.rice.edu

Research interests: Programming Languages, Compilers & Runtime Systems for Parallel Computing

Contributions

PPoPP 2020Steering Committee Member in Steering Committee
CHIUW 2019Author of GPUIterator: Bridging the Gap between Chapel and GPU Platforms within the CHIUW 2019-track
VEE 2019Committee Member in Steering Committee
PLACES 2019Author of Keynote: Unstructured Parallelism Considered Harmful -- Using Structured Parallelism for Enhanced Software Verification within the PLACES-track
PPoPP 2019Author of Transitive Joins: A Sound and Efficient Online Deadlock-Avoidance Policy within the Main Conference-track
Committee Member in Steering Committee
PPoPP 2018Committee Member in Steering Committee
ISMM 2017Author of A Marshalled Data Format for Pointers in Relocatable Data Blocks within the ISMM 2017-track
CC 2017Author of Optimized Two-Level Parallelization for GPU Accelerators using the Polyhedral Model within the Research Papers-track
Author of Keynote: Why the End-Game for Moore’s Law will be driven by a Compiler Renaissance within the Research Papers-track
Author of Why the End-Game for Moore's Law will be driven by a Compiler Renaissance? within the Keynote-track
PPoPP 2017General Chair in Organizing Committee
SPLASH 2017Author of Deadlock Avoidance in Parallel Programs with Futures: Why Parallel Tasks Should Not Wait for Strangers within the OOPSLA-track
PLDI 2017Committee Member in External Program Committee
VEE 2016Program Chair in Program Committee
Program Chair in Organizing Committee
SPLASH 2016Author of Automatic Parallelization of Pure Method Calls via Conditional Future Synthesis within the OOPSLA-track
SPLASH 2015Author of Exploiting Parallelism in Mobile Devices within the Posters-track
AGERE!Author of Selectors: Actors with Multiple Guarded Mailboxes within the AGERE!-track
Author of Savina - An Actor Benchmark Suite within the AGERE!-track
ECOOP 2015Author of The Eureka Programming Model for Speculative Task Parallelism within the Research Track-track
Author of The Eureka Programming Model for Speculative Task Parallelism within the Artifacts-track
SPLASH 2014Presenter of HJ-Viz: A New Tool for Visualizing, Debugging and Optimizing Parallel Programs within the Posters-track
SPLASH 2013Author of Isolation for Nested Task Parallelism within the OOPSLA-track
SPLASH 2012Author of Integrating task parallelism with actors within the OOPSLA Research Papers-track
Committee Member in External Reviewers within the OOPSLA Research Papers-track