I am a computer architect at Samsung Memory Solutions Lab (MSL), USA with a Ph.D. degree in Computer Science from Purdue University. My research interests generally lie in designing more reliable and performant computing systems, including server-class systems and energy-harvesting systems, against soft errors and power failures. To achieve this, I usually co-design compilers and architectures to maintain minimal hardware complexity while achieving high performance. My research works are typically published at top-tier system venues, e.g., ISCA, MICRO, ICS, PLDI, HPDC, and RTSS.