João M. P. Cardoso

Registered user since Sat 9 Jan 2016

Name:João M. P. Cardoso
Bio:

João M. P. Cardoso received a 5-year Electronics Engineering degree from the University of Aveiro in 1993, and an MSc and a PhD degree in Electrical and Computer Engineering from the IST/UTL (Technical University of Lisbon), Lisbon, Portugal in 1997 and 2001, respectively. He is currently Full Professor at the Department of Informatics Engineering, Faculty of Engineering of the University of Porto, Porto, Portugal and a research member of INESC TEC. Before, he was with the IST/UTL (2006-2008), a senior researcher at INESC-ID (2001-2009), and with the University of Algarve (1993-2006). In 2001/2002, he worked for PACT XPP Technologies, Inc., Munich, Germany. He has been involved in the organization and served as a Program Committee member for many international conferences. He was general Co-Chair of IEEE/IFIP EUC’2015 and IEEE CSE’2015, General Chair of FPL’2013, General Co-Chair of ARC’2014 and ARC’2006, Program Co-Chair of ARCS’2016, DASIP’2014, and RAW’2010. He is co-author of one Elsevier and one Springer book, co-editor of two Springer Books and four Springer LNCS volumes. He has (co-)authored over 200 scientific publications (including journal/conference papers and patents) on subjects related to compilers, embedded systems, and reconfigurable computing. He is the technical manager of the H2020 FET-HPC project ANTAREX. He has participated in a number of research projects: as co-scientific coordinator of the FP7 EU-funded project REFLECT (2010-2012), and as coordinator of a number of national funded projects. He is a senior member of IEEE, a member of IEEE Computer Society, and a senior member of ACM. ORCID: http://orcid.org/0000-0002-7353-1799

Country:Portugal
Affiliation:University of Porto and INESC TEC, Portugal
Research interests:Compilers, DSLs, Code Transformations, High-Level Synthesis, High-Performance Embedded Computing, Reconfigurable Computing, FPGAs

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