conf.researchr.org / Peter Sewell
Registered user since Wed 14 Sep 2016
Name:Peter Sewell
Country:United Kingdom
Affiliation:University of Cambridge
Personal website: http://www.cl.cam.ac.uk/~pes20/
Contributions
2025
2024
POPL
POCL
2023
2022
2020
DeepSpec
- Author of ARMv8 and RISC-V relaxed memory concurrency within the REMS-DeepSpec 2020-track
- Author of Sail: ISA semantics, symbolic execution, and axiomatic concurrency for ARMv8-A and RISC-V within the REMS-DeepSpec 2020-track
- Author of Welcome and brief project overviews within the REMS-DeepSpec 2020-track
- Author of Cerberus: executable reference semantics and memory object models for ISO and de facto C within the REMS-DeepSpec 2020-track
- Committee Member in Organizing Committee within the REMS-DeepSpec 2020-track
- Author of Rigorous modelling and proof for system security engineering: verifying whole-ISA security properties of CHERI-{MIPS,RISC-V,ARM} within the REMS-DeepSpec 2020-track
POPL
2019
2018
POPL
- Author of Simplifying ARM Concurrency: Multicopy-Atomic Axiomatic and Operational Models for ARMv8 within the Research Papers-track
- Author of Simplifying ARM Concurrency: Multicopy-atomic Axiomatic and Operational Models for ARMv8 within the Artifact Evaluation-track
- Committee Member in Program Committee within the Research Papers-track