Registered user since Thu 16 Jan 2020
Dr. Zhenman Fang is a Tenure-Track Assistant Professor in School of Engineering Science (Computer Engineering Option, since Apr 2019) and an Associate Member in School of Computing Science (since Aug 2019), Simon Fraser University, Canada. Zhenman founded and directs the HiAccel lab.
From Sept 2017 to Mar 2019, Zhenman worked in the Xilinx SDx group at San Jose as a Staff Software Engineer, where he works on the topic of accelerator-rich architectures and systems, which is the major focus of his postdoc research at UCLA. From Jul 2014 to Sept 2017, Zhenman was a postdoc in Department of Computer Science, UCLA, under the supervision of Prof. Jason Cong and Prof. Glenn Reinman. While at UCLA, he was also a member of the NSF/Intel funded multi-university Center for Domain-Specific Computing (CDSC) and SRC/DARPA funded multi-university Center for Future Architectures Research (C-FAR). Zhenman earned his Ph.D degree in Jun 2014 from School of Computer Science, Fudan University, China, under the supervision of Prof. Binyu Zang. He also spent the last 15 months of his PhD study visiting Department of Computer Science and Engineering, University of Minnesota at Twin Cities, under the supervision of Prof. Pen-Chung Yew.
Zhenman’s recent research focuses on customizable computing with specialized hardware acceleration, which aims to sustain the ever-increasing performance and energy-efficiency demand of important application domains in post-Moore’s law era. It spans the entire computing stack, including emerging application drivers, novel computer architectures, and corresponding programming, runtime, and tool support. Zhenman has published over 20 papers in top conferences and journals, including two best paper awards (TCAD 2019 Donald O. Pederson best paper award and MEMSYS 2017), two best paper nominees (HPCA 2017 and ISPASS 2018), and an invited paper from Proceedings of the IEEE 2019.
|LCTES 2020|| pc in Program Committee within the LCTES 2020-track|
Author of WIP: FPGA-based Near Data Processing Platform Selection Using Fast Performance Modeling within the LCTES 2020-track