Systematic Mapping Study on Risks and Vulnerabilities in Software Containers (APSEC 2025 - Technical Track)

Who

Maha Sroor, Teerath Das, Rahul Mohanani, Tommi Mikkonen

Track

APSEC 2025 Technical Track

This program is tentative and subject to change.

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When

Wed 3 Dec 2025 16:00 - 16:20 at (Session A) lotus room - Session 2A: Program Analysis (Technical Track)

Maha Sroor

University of Jyväskylä

Finland

Teerath Das

University of Jyväskylä

Finland

Rahul Mohanani

University of Jyväskylä

Finland

Tommi Mikkonen

University of Jyvaskyla

Finland

This program is tentative and subject to change.

Time Zone

The program is currently displayed in (GMT+08:00) Beijing, Chongqing, Hong Kong, Urumqi.

Use conference time zone: (GMT+08:00) Beijing, Chongqing, Hong Kong, UrumqiSelect other time zone

The GMT offsets shown reflect the offsets at the moment of the conference.

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Session Program

Wed 3 Dec
Displayed time zone: Beijing, Chongqing, Hong Kong, Urumqi change

16:00 - 17:20	Session 2A: Program Analysis (Technical Track)Technical Track at (Session A) lotus room

16:00 20m Full-paper		Systematic Mapping Study on Risks and Vulnerabilities in Software Containers Technical Track Maha Sroor University of Jyväskylä, Teerath Das University of Jyväskylä, Rahul Mohanani University of Jyväskylä, Tommi Mikkonen University of Jyvaskyla
16:20 20m Full-paper		A Hierarchical Hybrid-Intelligence Architecture with Consensus, Debate, and Reflection for High-Fidelity NL-to-PPTL Conversion Technical Track Tianchi Zhang East China Normal University, Jinhui Lyu , Yong Cai East China Normal University
16:40 20m Full-paper		MAAP: A Self-Evolving Multi-Agent Automated Vulnerability Repair Framework for Python Technical Track Junfan Chen Hainan University, Zhiyuan Fu Hainan University, Ting Yang Xidian University, Ruidong Li Kanazawa University, Hongyu Sun Hainan University, Yuqing Zhang University of Chinese Academy of Sciences, Hainan University
17:00 20m Full-paper		An Empirical Study of Reinforcement Learning-based Class Integration Test Order Generation Technical Track Jiayi Wang Shenzhen Technology University, Shuxiang Zheng Shenzhen Technology University, Miao Zhang Shenzhen Technology University, Yan Xiao Sun Yat-sen University, Peihong Chen Shenzhen Technology University, Xiaoxing Yang Shenzhen Technology University