Avoiding Consistency Exceptions Under Strong Memory Consistency Models
Shared-memory languages and systems generally provide weak or undefined semantics for executions with data races. Prior work has proposed memory consistency models that ensure well-defined, easy-to-understand semantics based on \emph{region serializability} (RS), but the resulting system may throw a \emph{consistency exception} in the presence of a data race. Consistency exceptions can occur unexpectedly even in well-tested programs, hurting availability and thus limiting the practicality of RS-based memory models.
To our knowledge, this paper is the first to consider the problem of availability for memory consistency models that throw consistency exceptions. We first extend existing approaches that enforce \emph{RSx}, a memory model based on serializability of synchronization-free regions (SFRs), to avoid region conflicts and thus consistency exceptions. These new approaches demonstrate both the potential for and limitations of avoiding consistency exceptions under RSx. To improve availability further, we introduce (1) a new memory model called \emph{RIx} based on \emph{isolation} of SFRs and (2) a new approach called \emph{Avalon} that provides RIx. We demonstrate two variants of Avalon that offer different performance–availability tradeoffs for RIx.
An evaluation on real Java programs shows that this work’s novel approaches are able to reduce consistency exceptions, thereby improving the applicability of strong memory consistency models. Furthermore, the approaches provide compelling points in the performance–availability tradeoff space for memory consistency enforcement. RIx and Avalon thus represent a promising direction for tackling the challenge of availability under strong consistency models that throw consistency exceptions.
Sun 18 JunDisplayed time zone: Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna change
16:00 - 17:30 | Session 4: A Deeper LookISMM 2017 at Aula Master Chair(s): Steve Blackburn Australian National University | ||
16:00 30mTalk | "What's in a Name?" Going Beyond Allocation Site Names in Heap Analysis ISMM 2017 | ||
16:30 30mTalk | A Refinement Hierarchy for Free List Memory Allocators ISMM 2017 Bin Fang East China Normal University (China) and University Paris Diderot and CNRS (France), Mihaela Sighireanu IRIF, University Paris Diderot and CNRS, France | ||
17:00 30mTalk | Avoiding Consistency Exceptions Under Strong Memory Consistency Models ISMM 2017 Minjia Zhang Microsoft Research, Swarnendu Biswas University of Texas at Austin, Michael D. Bond Ohio State University |