Fully Randomized Pointers
Memory errors continue to be a critical concern for programs written in low-level programming languages such as C and C++. A number of defenses have been proposed with varying trade-offs in overhead, compatibility, and attack resistance. Some defenses are highly compatible but only provide minimal protection, and can be easily bypassed by knowledgeable attackers. On the other end of the spectrum, capability systems provide very strong (unforgeable) protection but require novel software and hardware implementations that have poor compatibility by definition. The challenge is to achieve both very strong protection while maintaining compatibility with existing software stacks.
We propose Fully Randomized Pointers (FRP) as a novel way to get a much stronger memory error defense, resistant to bypass attacks and compatible with existing compiled software. The key idea is to fully randomize pointer bits as much as possible. The high degree of randomization renders even brute force attacks impractical. We design a FRP encoding that is: (1) compatible with existing binary code (recompilation not needed); and (2) decoupled from the underlying object layout. FRP is prototyped as: (i) a software implementation (BlueFRP) to test security and compatibility; and (ii) a proof-of-concept hardware implementation (GreenFRP) to evaluate performance. We show FRP is secure, practical, and compatible at the binary level, while our hardware implementation achieves modest performance overheads (${<}10%$).
Tue 17 JunDisplayed time zone: Seoul change
15:40 - 17:05 | Session 4: 1540-1705 [Systems and Architecture]ISMM 2025 at Lilac Chair(s): Steve Blackburn Google and Australian National University | ||
15:40 20mTalk | Fully Randomized Pointers ISMM 2025 Sai Dhawal Phaye National University of Singapore, Gregory J. Duck National University of Singapore, Roland H. C. Yap National University of Singapore, Trevor E. Carlson National University of Singapore DOI | ||
16:00 20mTalk | TierTrain: Proactive Memory Tiering for CPU-Based DNN Training ISMM 2025 Sathvik Swaminathan Intel Labs, Sandeep Kumar Intel Labs, Aravinda Prasad Intel Labs, Sreenivas Subramoney Intel Labs DOI | ||
16:20 20mTalk | EMD: Fair and Efficient Dynamic Memory De-bloating of Transparent Huge PagesRecorded ISMM 2025 Parth Gangar Fujitsu Research of India, Ashish Panwar Microsoft Research India, K. Gopinath Rishihood University DOI | ||
16:40 20mTalk | Compiler-Assisted Crash Consistency for PMEMRecorded ISMM 2025 Yun Joon Soh University of California San Diego, Sihang Liu University of Waterloo, Steven Swanson University of California San Diego, Jishen Zhao University of California San Diego DOI | ||
17:00 5mDay closing | Closing remarks ISMM 2025 |