FormaliSE 2019 Contributors

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Results (77)

A Waqar AhmadAhmad, Waqar Carnegie Mellon University On the Formalization of Importance Measures using HOL Theorem Proving
Ebru Aydin GolAydin Gol, Ebru Middle East Technical University Clock Reduction in Timed Automata while Preserving Design Parameters
B Omar BatainehBataineh, Omar NTU Epistemic Model Checking of Distributed Commit Protocols with Byzantine faults
Cláudio Belo LourençoBelo Lourenço, Cláudio LRI, Université Paris-Sud & INRIA Saclay A Generalized Program Verification Workflow Based on Loop Elimination and SA Form
Marcello BersaniBersani, Marcello Politecnico di Milano, Italy Committee Member in Program Committee within the FormaliSE-track
Dirk BeyerBeyer, Dirk LMU MunichGermany Committee Member in Program Committee within the FormaliSE-track
Domenico BianculliBianculli, Domenico University of LuxembourgLuxembourg Committee Member in Program Committee within the FormaliSE-track
Simon BliudzeBliudze, Simon INRIA Lillle - Nord EuropeFrance Committee Member in Program Committee within the FormaliSE-track
Andreas BollinBollin, Andreas University of Klagenfurt, Austria Committee Member in Program Committee within the FormaliSE-track
Einar Broch JohnsenBroch Johnsen, Einar University of Oslo Committee Member in Program Committee within the FormaliSE-track
C Ana CavalcantiCavalcanti, Ana University of YorkUnited Kingdom Committee Member in Program Committee within the FormaliSE-track
Stéphanie ChallitaChallita, Stéphanie Inria, France Session Chair of Session 4 (part of FormaliSE) Communications Chair in Organizing Committee within the FormaliSE-track
Kevin ChalmersChalmers, Kevin Edinburgh Napier University Verifying Channel Communication Correctness for a Multi-Core Cooperatively Scheduled Runtime Using CSP
Marsha ChechikChechik, Marsha University of TorontoCanada Committee Member in Program Committee within the FormaliSE-track
Philippe ColletCollet, Philippe University of Nice Towards Sampling and Simulation-Based Analysis of Featured Weighted Automata
Maxime CordyCordy, Maxime SnT, University of Luxembourg Towards Sampling and Simulation-Based Analysis of Featured Weighted Automata
D Nancy DayDay, Nancy University of Waterloo, CanadaCanada Session Chair of Session 2 (part of FormaliSE) Program Co-Chair in Program Chairs within the FormaliSE-track
Juergen DingelDingel, Juergen Queen's University, Kingston, Ontario Committee Member in Program Committee within the FormaliSE-track
F Michalis FamelisFamelis, Michalis Université de MontréalCanada A Vision for Helping Developers Use APIs by Leveraging Temporal Patterns
Amy FeltyFelty, Amy University of OttawaCanada Committee Member in Program Committee within the FormaliSE-track
Maria João FradeFrade, Maria João HASLab/INESC TEC & Universidade do Minho, Portugal A Generalized Program Verification Workflow Based on Loop Elimination and SA Form
Marc FrappierFrappier, Marc Université de Sherbrooke, Canada Committee Member in Program Committee within the FormaliSE-track
Carlo A. FuriaFuria, Carlo A. Università della Svizzera italiana (USI)Switzerland Committee Member in Program Committee within the FormaliSE-track
G Marco GarioGario, Marco Siemens Corporate Technology FASTEN: An Open Extensible Framework to Experiment with Formal Specification Approaches - Using Language Engineering to Develop a Multi-Paradigm Specification Environment for NuSMV
Milad K. GhaleGhale, Milad K. The Australian National University Modular Synthesis of Verified Verifiers of Computation with STV Algorithms
Stefania GnesiGnesi, Stefania Istituto di Scienza e Tecnologie dell'Informazione "Alessandro Faedo" Italy Welcome by the Chairs Organization Co-chair in Organizing Committee within the FormaliSE-track
Arie GurfinkelGurfinkel, Arie University of WaterlooCanada Committee Member in Program Committee within the FormaliSE-track
H Osman HasanHasan, Osman Concordia University, Canada On the Formalization of Importance Measures using HOL Theorem Proving
Marieke HuismanHuisman, Marieke University of TwenteNetherlands Committee Member in Program Committee within the FormaliSE-track
I Dmitry IvanovIvanov, Dmitry TomTom Static Analysis for Worst-Case Battery Utilization
J Taylor T JohnsonJohnson, Taylor T Vanderbilt UniversityUnited States Parallelizable Reachability Analysis Algorithms for Feed-Forward Neural Networks
Jeffrey JoyceJoyce, Jeffrey Critical System Labs Inc. Keynote presentation: The Benefits of (having doubts about) Formal Methods
K Eunsuk KangKang, Eunsuk Carnegie Mellon UniversityUnited States Session Chair of Session 3 (part of FormaliSE) Committee Member in Program Committee within the FormaliSE-track Social Media Chair in Organizing Committee within the FormaliSE-track
Ajay KrishnaKrishna, Ajay Inria Grenoble, FranceFrance Rigorous Design and Deployment of IoT Applications
L Peter Gorm LarsenLarsen, Peter Gorm Aarhus UniversityDenmark Committee Member in Program Committee within the FormaliSE-track
Mark LawfordLawford, Mark McMaster Committee Member in Program Committee within the FormaliSE-track
Sami LazregLazreg, Sami Visteon Electronics and Universite Cote d AzurFrance Towards Sampling and Simulation-Based Analysis of Featured Weighted Automata
Michel Le PallecLe Pallec, Michel Nokia Bell Labs Rigorous Design and Deployment of IoT Applications
Axel LegayLegay, Axel Towards Sampling and Simulation-Based Analysis of Featured Weighted Automata
Robyn LutzLutz, Robyn Iowa State University Committee Member in Program Committee within the FormaliSE-track
Andreas LööwLööw, Andreas Chalmers University of Technology A Proof-Producing Translator for Verilog Development in HOL
M Diego Manzanas LopezManzanas Lopez, Diego Vanderbilt University Parallelizable Reachability Analysis Algorithms for Feed-Forward Neural Networks
Paolo MasciMasci, Paolo National Institute of Aerospace, USA Committee Member in Program Committee within the FormaliSE-track
Radu MateescuMateescu, Radu INRIA Rigorous Design and Deployment of IoT Applications
Shahid Ali MurtzaMurtza, Shahid Ali National University of Sciences and Technology On the Formalization of Importance Measures using HOL Theorem Proving
Patrick MusauMusau, Patrick Vanderbilt University Parallelizable Reachability Analysis Algorithms for Feed-Forward Neural Networks
Magnus O. MyreenMyreen, Magnus O. Chalmers University of Technology, SwedenSweden A Proof-Producing Translator for Verilog Development in HOL
N Luan NguyenNguyen, Luan University of Pennsylvania Parallelizable Reachability Analysis Algorithms for Feed-Forward Neural Networks
Ludovic NoirieNoirie, Ludovic Nokia Bell Labs Rigorous Design and Deployment of IoT Applications
Michael NorrishNorrish, Michael Data61 at CSIRO, Australia / Australian National University, AustraliaAustralia Modular Synthesis of Verified Verifiers of Computation with STV Algorithms
P Richard PaigePaige, Richard McMaster UniversityCanada Committee Member in Program Committee within the FormaliSE-track
Dirk PattinsonPattinson, Dirk Australian National UniversityAustralia Modular Synthesis of Verified Verifiers of Computation with STV Algorithms
Jan PedersenPedersen, Jan University of Nevada Las Vegas Verifying Channel Communication Correctness for a Multi-Core Cooperatively Scheduled Runtime Using CSP
Patrizio PelliccionePelliccione, Patrizio Chalmers \| University of Gothenburg and University of L'Aquila Committee Member in Program Committee within the FormaliSE-track
Nico PlatPlat, Nico ThanosNetherlands Discussion/closing Organization Co-chair in Organizing Committee within the FormaliSE-track
Corina S. PăsăreanuPăsăreanu, Corina S. Carnegie Mellon University Silicon Valley, NASA Ames Research Center Committee Member in Program Committee within the FormaliSE-track
R Erick RaelijohnRaelijohn, Erick University of Montreal A Vision for Helping Developers Use APIs by Leveraging Temporal Patterns
Daniel RatiuRatiu, Daniel FASTEN: An Open Extensible Framework to Experiment with Formal Specification Approaches - Using Language Engineering to Develop a Multi-Paradigm Specification Environment for NuSMV
Mark ReynoldsReynolds, Mark The Univeristy of Western Australia Epistemic Model Checking of Distributed Commit Protocols with Byzantine faults
Matteo RossiRossi, Matteo Politecnico di Milano Session Chair of Session 1 (part of FormaliSE) Program Co-Chair in Program Chairs within the FormaliSE-track
S Houari SahraouiSahraoui, Houari Université de MontréalCanada A Vision for Helping Developers Use APIs by Leveraging Temporal Patterns
Gwen SalaünSalaün, Gwen University of Grenoble AlpesFrance Rigorous Design and Deployment of IoT Applications
Gerardo SchneiderSchneider, Gerardo University of GothenburgSweden Committee Member in Program Committee within the FormaliSE-track
Hannes SchoenhaarSchoenhaar, Hannes Siemens Corporate Technology FASTEN: An Open Extensible Framework to Experiment with Formal Specification Approaches - Using Language Engineering to Develop a Multi-Paradigm Specification Environment for NuSMV
Sibylle SchuppSchupp, Sibylle Static Analysis for Worst-Case Battery Utilization
Jorge Sousa PintoSousa Pinto, Jorge HASLab/INESC TEC & Universidade do Minho, Portugal A Generalized Program Verification Workflow Based on Loop Elimination and SA Form
Paola SpoletiniSpoletini, Paola Kennesaw State UniversityUnited States Committee Member in Program Committee within the FormaliSE-track
Jun SunSun, Jun Singapore Management University, SingaporeSingapore Committee Member in Program Committee within the FormaliSE-track
T Sofiene TaharTahar, Sofiene Concordia University On the Formalization of Importance Measures using HOL Theorem Proving
Maurice ter Beekter Beek, Maurice Istituto di Scienza e Tecnologie dell'Informazione "Alessandro Faedo" Committee Member in Program Committee within the FormaliSE-track
Stefano TonettaTonetta, Stefano Fondazione Bruno Kessler, Italy Committee Member in Program Committee within the FormaliSE-track
Hoang-Dung TranTran, Hoang-Dung Vanderbilt University Parallelizable Reachability Analysis Algorithms for Feed-Forward Neural Networks
W Michael WhalenWhalen, Michael University of MinnesotaUnited States Committee Member in Program Committee within the FormaliSE-track
Kirsten WinterWinter, Kirsten The University of Queensland Committee Member in Program Committee within the FormaliSE-track
X Weiming XiangXiang, Weiming Vanderbilt University Parallelizable Reachability Analysis Algorithms for Feed-Forward Neural Networks
Y Beyazit YalcinkayaYalcinkaya, Beyazit Middle East Technical UniversityTurkey Clock Reduction in Timed Automata while Preserving Design Parameters
Xiao Dong YangYang, Xiao Dong Vanderbilt University Parallelizable Reachability Analysis Algorithms for Feed-Forward Neural Networks