Chao Wang

Registered user since Tue 12 Jun 2018

Name:Chao Wang
Bio:

Chao Wang is an Associate Professor of Computer Science at University of Southern California. His research interests are in software engineering and formal methods, with emphasis on logic, verification and automated reasoning. He published a book, two edited books, and more than 100 papers. He chaired the program committees of CAV 2020 and AVTA 2018, and served on the program committees of conferences such as ICSE, FSE, ASE, and ISSTA. He received the U.S. Office of Naval Research (ONR) Young Investigator award, National Science Foundation (NSF) CAREER award, and best paper awards including ACM SIGSOFT Distinguished Paper award.

Country:United States
Affiliation:University of Southern California
Research interests:formal verification, program repair, concurrency, side channel, AI safety

Contributions

ICSE 2024 Committee Member in Research Track within the Research Track-track
PLDI 2023 Committee Member in PLDI Review Committee within the PLDI Research Papers-track
ESEC/FSE 2022 Committee Member in Program Committee within the Research Papers-track
ASE 2022 Author of Learning to Synthesize Relational Invariants within the Research Papers-track
ASE 2021 Committee Member in Program Committee within the Research Papers-track
ICSE 2021 Author of Data-Driven Synthesis of a Provably Sound Side Channel Analysis within the Technical Track-track
ASE 2020 Author of NeuroDiff: Scalable Differential Verification of Neural Networks using Fine-Grained Approximation within the Research Papers-track
ICSE 2020 Author of ReluDiff: Differential Verification of Deep Neural Networks within the Technical Papers-track
Author of Towards Understanding and Fixing Upstream Merge Induced Conflicts in Divergent Forks: An industrial Case Study within the Software Engineering in Practice-track
Author of Towards Understanding and Fixing Upstream Merge Induced Conflicts in Divergent Forks: An Industrial Case Study within the ICSE 2020 Posters-track
ASE 2019 Author of Debreach: Mitigating Compression Side Channels via Static Analysis and Transformation within the Research Papers-track
PLDI 2019 Author of Abstract Interpretation under Speculative Execution within the PLDI Research Papers-track
ICSE 2019 Author of ConTesa: Directed Test Suite Augmentation for Concurrent Software within the Journal-First Papers-track
ESEC/FSE 2018 Author of Adversarial Symbolic Execution for Detecting Concurrency-Related Cache Timing Leaks within the Research Papers-track
ISSTA 2018 Author of Eliminating Timing Side-Channel Leaks using Program Repair within the ISSTA Artifacts-track
ISSTA 2017 Session Chair of Concurrency (part of Technical Papers)