Ajitha Rajan

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Name: Ajitha Rajan

Bio: I am a Lecturer (or Asst. Professor in American terms) and Chancellor’s Fellow at the School of Informatics in the University of Edinburgh (since December 2012). Previously, I was a post-doc at Oxford University, Computer Science Department and at Laboratoire d’Informatique de Grenoble (LIG) at Grenoble, France. I graduated with a PhD in Computer Science from the University of Minnesota in Aug 2009. My PhD advisor is Prof. Mats Heimdahl.

My research is in the field of software engineering and strives to address challenges in software validation and verification. I am especially interested in: Machine learning applied to the test oracle problem - Automatically classifying test executions as pass/fail. Defining quality metrics for GPU programs. I am interested in coverage metrics for code, design, and requirements (functional, non-functional, security); Automated test case generation and execution for blockchain applications and GPU programs; Optimising energy consumed by software. We investigated the energy consumed by software design patterns and proposed compiler optimisations for a couple fo the patterns in recent work; Economic models for incremental software and software on the cloud.

Country: United Kingdom

Affiliation: University of Edinburgh

Personal website: http://homepages.inf.ed.ac.uk/arajan/

Contributions

ISSTA 2020Committee Member in Program Committee within the Technical Papers-track
ICST 2020Programme Committee in Program Committee within the Testing Tools Track-track
ECOOP 2019Committee Member in Program Committee within the Research Papers-track
FASE 2019Author of CLTestCheck: Measuring Test Effectiveness for GPU Kernels within the FASE 2019-track
ETAPS 2019Mentor in Mentors within the Mentoring Workshop-track
Speaker in Speakers within the Mentoring Workshop-track
Author of CLTestCheck: Measuring Test Effectiveness for GPU Kernels within the Posters-track
Author of How to Give an Effective Talk within the Mentoring Workshop-track
ICSE 2019Committee Member in Program Committee within the Software Engineering in Practice-track
ISSTA 2017Author of Compiler-Assisted Test Acceleration on GPUs for Embedded Software within the Technical Papers-track
Author of ParTeCL: Parallel Testing using OpenCL within the Demonstrations-track
* ICSE 2018 *Author of Poster F55: Reordering Tests for Faster Test Suite Execution within the Posters -track