APSEC 2022
Tue 6 - Fri 9 December 2022
Wed 7 Dec 2022 14:50 - 15:10 at Room2 - Model Checking 2 Chair(s): Hideto Ogawa

Bounded model checking (BMC) aims at checking whether a model satisfies a property. Most of the existing SAT-based BMC approaches rely on generic strategies, which are supposed to work for any SAT problem.

The key idea defended in this paper is to tune SAT solvers algorithm using: (1) a static classification based on the variables used to encode the BMC into a Boolean formula; (2) and use the hierarchy of Manna&Pnueli that classifies any property expressed through Linear-time Temporal Logic (LTL). By combining these two information with the classical Literal Bloc Distance (LBD) measure, we designed a new heuristic, well suited for solving BMC problems. In particular, our work identifies and exploits a new set of relevant (learnt) clauses.

We experiment with these ideas by developing a tool dedicated for SAT-based LTL BMC solvers, called XX. Our experiments over a large database of BMC problems, show promising results. In particular, XX provides good performance on UNSAT problems. This work highlights the importance of considering the structure of the underlying problem in SAT procedures.

Wed 7 Dec

Displayed time zone: Osaka, Sapporo, Tokyo change

14:30 - 15:40
Model Checking 2Technical Track at Room2
Chair(s): Hideto Ogawa Hitachi Ltd.
14:30
20m
Paper
SysML Flow Model
Technical Track
Guohuan Ding East China Normal University, Jing Liu East China Normal University
14:50
20m
Paper
Tuning SAT solvers for LTL Model Checking
Technical Track
Anissa Kheireddine LRDE, Etienne Renault LRDE, Souheib Baarir Université Paris Ouest Nanterre La Défense/LIP6
15:10
20m
Paper
Bounded Model Checking of Synchronous Reactive Models in Ptolemy II
Technical Track
Xiaozhen Zhang Dalian University of Technology, Zhaoming Yang Dalian University of Technology, Hui Kong Huawei Technologies Co., Ltd., Weiqiang Kong Dalian University of Technology