APSEC 2022
Tue 6 - Fri 9 December 2022
Wed 7 Dec 2022 15:10 - 15:30 at Room2 - Model Checking 2 Chair(s): Hideto Ogawa

Ptolemy II is an open-source modeling and simulation tool supporting the design of the concurrent, real-time and embedded systems, particularly those involving heterogeneous mixtures of models of computation. In this paper, we present a bounded model checking (BMC) and k-induction based formal verification approach to Ptolemy II, especially its synchronous reactive (SR) models which are commonly used to design systems with complicated control logic. Compared to the verification of common finite-state based systems, the challenges include fixed-point semantics associated with tick execution, simultaneous actor reaction to an input signal, and instantaneous communication between actors through sending messages via ports, etc. In addition to tackle these challenges, we also present a BMC encoding approach to most common non-FSMActor actors in SR, which can be used as a library for similar work such as Lingua France. We have implemented a prototype (named as Ptolemy-Z3) and integrated it into the Ptolemy II tool. Experimental results show that Ptolemy-Z3 outperforms the existing tool Ptolemy-NuSMV significantly in both capability and efficiency.

Wed 7 Dec

Displayed time zone: Osaka, Sapporo, Tokyo change

14:30 - 15:40
Model Checking 2Technical Track at Room2
Chair(s): Hideto Ogawa Hitachi Ltd.
14:30
20m
Paper
SysML Flow Model
Technical Track
Guohuan Ding East China Normal University, Jing Liu East China Normal University
14:50
20m
Paper
Tuning SAT solvers for LTL Model Checking
Technical Track
Anissa Kheireddine LRDE, Etienne Renault LRDE, Souheib Baarir Université Paris Ouest Nanterre La Défense/LIP6
15:10
20m
Paper
Bounded Model Checking of Synchronous Reactive Models in Ptolemy II
Technical Track
Xiaozhen Zhang Dalian University of Technology, Zhaoming Yang Dalian University of Technology, Hui Kong Huawei Technologies Co., Ltd., Weiqiang Kong Dalian University of Technology