Ecmas: Efficient Circuit Mapping and Scheduling for Surface Code
As the leading candidate of quantum error correction codes, surface code suffers from significant overhead, such as execution time. Reducing the circuit's execution time not only enhances its execution efficiency but also improves fidelity. However, finding the shortest execution time is NP-hard.
In this work, we study the surface code mapping and scheduling problem. To reduce the execution time of a quantum circuit, we first introduce two novel metrics: Circuit Parallelism Degree and Chip Communication Capacity to quantitatively characterize quantum circuits and chips. Then, we propose a resource-adaptive mapping and scheduling method, named Ecmas, with customized initialization of chip resources for each circuit. Ecmas can dramatically reduce the execution time in both double defect and lattice surgery models. Furthermore, we provide an additional version Ecmas-ReSu for sufficient qubits, which is performance-guaranteed and more efficient. Extensive numerical tests on practical datasets show that Ecmas outperforms the state-of-the-art methods by reducing the execution time by 51.5% on average for double defect model. Ecmas can reach the optimal result in most benchmarks, reducing the execution time by up to 13.9% for lattice surgery model.
Mon 4 MarDisplayed time zone: London change
16:10 - 17:30 | |||
16:10 20mTalk | AXI4MLIR: User-Driven Automatic Host Code Generation for Custom AXI-Based Accelerators Main Conference Nicolas Bohm Agostini Northeastern University; Pacific Northwest National Laboratory, Jude Haris University of Glasgow, Perry Gibson University of Glasgow, Malith Jayaweera Northeastern University, norm rubin Northeastern University, Antonino Tumeo Pacific Northwest National Laboratory, José L. Abellán University of Murcia, José Cano University of Glasgow, David Kaeli Northeastern University Pre-print | ||
16:30 20mTalk | Ecmas: Efficient Circuit Mapping and Scheduling for Surface Code Main Conference Mingzheng Zhu University of Science and Technology of China, Hao Fu University of Science and Technology of China, Jun Wu University of Science and Technology of China, Chi Zhang University of Science and Technology of China, Wei Xie University of Science and Technology of China, Xiang-Yang Li University of Science and Technology of China Pre-print | ||
16:50 20mTalk | PresCount: Effective Register Allocation for Bank Conflict Reduction Main Conference Xiaofeng Guan Shanghai Jiao Tong University; Shanghai Enflame Technology, Hao Zhou Shanghai Enflame Technology, Guoqing Bao Shanghai Enflame Technology, Handong Li Shanghai Jiao Tong University, Liang Zhu Shanghai Jiao Tong University, Jianguo Yao Shanghai Jiao Tong University; Shanghai Enflame Technology Pre-print | ||
17:10 20mTalk | Tackling the Matrix Multiplication Micro-kernel Generation with Exo Main Conference Adrián Castelló Universitat Politècnica de València, Julian Bellavita Cornell University, Grace Dinh University of California at Berkeley, Yuka Ikarashi Massachusetts Institute of Technology, Héctor Martínez Universidad de Córdoba Pre-print |