Automated Verification of the Parallel Bellman--Ford AlgorithmVirtual
Mon 18 Oct 2021 15:40 - 15:55 at Zurich B - Session 4B Chair(s): Kedar Namjoshi
Many real-world problems such as internet routing are actually graph problems. To develop efficient solutions to such problems, more and more parallel graph algorithms are proposed. This paper discusses the mechanized verification of a commonly used parallel graph algorithm, namely the Bellman–Ford algorithm, which provides an inherently parallel solution to the Single-Source Shortest Path problem. Concretely, we verify an unoptimized GPU version of the Bellman–Ford algorithm, using the VerCors verifier. The main challenge that we had to address was to find suitable global invariants of the graph-based properties for automated verification. This case study is the first deductive verification to prove functional correctness of the parallel Bellman–Ford algorithm. It provides the basis to verify other, optimized implementations of the algorithm. Moreover, it may also provide a good starting point to verify other parallel graph-based algorithms.
Mon 18 OctDisplayed time zone: Central Time (US & Canada) change
07:40 - 09:00 | |||
07:40 15mTalk | Automated Verification of the Parallel Bellman--Ford AlgorithmVirtual SAS Mohsen Safari University of Twente, The Netherlands, Wytse Oortwijn ETH Zurich, Switzerland, Marieke Huisman University of Twente | ||
07:55 15mTalk | Backward Symbolic Execution with Loop FoldingVirtual SAS | ||
08:10 15mTalk | Improving Thread-Modular Abstract InterpretationVirtual SAS Michael Schwarz Technische Universität München, Simmo Saan University of Tartu, Estonia, Helmut Seidl Technische Universität München, Kalmer Apinis University of Tartu, Estonia, Julian Erhard , Vesal Vojdani University of Tartu Pre-print Media Attached | ||
08:25 15mTalk | Symbolic Automatic Relations and Their Applications to SMT and CHC SolvingVirtual SAS Takumi Shimoda The University of Tokyo, Naoki Kobayashi University of Tokyo, Japan, Ken Sakayori The University of Tokyo, Ryosuke Sato University of Tokyo, Japan | ||
08:40 20mLive Q&A | Session 4B Discussion, Questions and Answers SAS |
15:40 - 17:00 | |||
15:40 15mTalk | Automated Verification of the Parallel Bellman--Ford AlgorithmVirtual SAS Mohsen Safari University of Twente, The Netherlands, Wytse Oortwijn ETH Zurich, Switzerland, Marieke Huisman University of Twente | ||
15:55 15mTalk | Backward Symbolic Execution with Loop FoldingVirtual SAS | ||
16:10 15mTalk | Improving Thread-Modular Abstract InterpretationVirtual SAS Michael Schwarz Technische Universität München, Simmo Saan University of Tartu, Estonia, Helmut Seidl Technische Universität München, Kalmer Apinis University of Tartu, Estonia, Julian Erhard , Vesal Vojdani University of Tartu Pre-print Media Attached | ||
16:25 15mTalk | Symbolic Automatic Relations and Their Applications to SMT and CHC SolvingVirtual SAS Takumi Shimoda The University of Tokyo, Naoki Kobayashi University of Tokyo, Japan, Ken Sakayori The University of Tokyo, Ryosuke Sato University of Tokyo, Japan | ||
16:40 20mLive Q&A | Session 4B Discussion, Questions and Answers SAS |