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VEE 2017
Sat 8 - Sun 9 April 2017 Xi'an, China
Sat 8 Apr 2017 14:30 - 15:00 at Zhu Que Room - GPUs, FPGAs, etc Chair(s): David Chisnall

Computer systems are increasingly featuring powerful parallel devices with the advent of many-core CPUs and GPUs. This offers the opportunity to solve computationally-intensive problems at a fraction of the time traditional CPUs need. However, exploiting heterogeneous hardware requires the use of low-level programming language approaches such as OpenCL, which is incredibly challenging, even for advanced programmers.

On the application side, interpreted dynamic languages are increasingly becoming popular in many domains due to their simplicity, expressiveness and flexibility. However, this creates a wide gap between the high-level abstractions offered to programmers and the low-level hardware-specific interface. Currently, programmers must rely on high performance libraries or they are forced to write parts of their application in a low-level language like OpenCL. Ideally, non-expert programmers should be able to exploit heterogeneous hardware directly from their interpreted dynamic languages.

In this paper, we present a technique to transparently and automatically offload computations from interpreted dynamic languages to heterogeneous devices. Using just-in-time compilation, we automatically generate OpenCL code at runtime which is specialized to the actual observed data types using profiling information. We demonstrate our technique using \emph{R}, which is a popular interpreted dynamic language predominately used in big data analytic. Our experimental results show the execution on a GPU yields speedups of over 150x compared to the sequential FastR implementation and the obtained performance is competitive with manually written GPU code. We also show that when taking into account start-up time, large speedups are achievable, even when the applications run for as little as a few seconds.

Sat 8 Apr
Times are displayed in time zone: (GMT) Azores change

14:00 - 15:30: Session 2 - GPUs, FPGAs, etc at Zhu Que Room
Chair(s): David ChisnallUniversity of Cambridge
vee-2017-Session-214:00 - 14:30
Anshuj GargIndian Institute of Technology, Bombay, Debadatta MishraIndian Institute of Technology, Bombay, Purushottam KulkarniIndian Institute of Technology, Bombay
File Attached
vee-2017-Session-214:30 - 15:00
Juan FumeroThe University of Edinburgh, Michel SteuwerThe University of Edinburgh, Lukas StadlerOracle Labs, Austria, Christophe DubachUniversity of Edinburgh
Link to publication
vee-2017-Session-215:00 - 15:30
Christos KotselidisThe University of Manchester, James ClarksonThe University of Manchester, Andrey RodchenkoThe University of Manchester, Andrew NisbetThe University of Manchester, John MawerThe University of Manchester, Mikel Luján
File Attached