Louis-Noël Pouchet -

Registered user since Thu 1 Dec 2016

Name:Louis-Noël Pouchet

Affiliation:Colorado State University, USA

Contributions

CC 2023
CC 2022	PC Member in Program Committee within the CC Research Papers-track Steering Committee Member in Steering Committee
CGO 2022	Author of PALMED: Throughput Characterization for Superscalar Architectures within the Main Conference-track
SPLASH 2021	Author of Automated Derivation of Parametric Data Movement Lower Bounds for Affine Programs within the SIGPLAN Papers-track
PLDI 2021	Committee Member in Program Committee within the PLDI-track
CC 2021	Committee Member in Steering Committee Author of PolyBench/Python: Benchmarking Python Environments with Polyhedral Optimizations within the CC Research Papers-track Committee Member in Program Committee within the CC Research Papers-track
SPLASH 2022	Committee Member in Review Committee within the OOPSLA-track
CGO 2020
CC 2020	General Chair in Organizing Committee
PLDI 2020	Author of Automated Derivation of Parametric Data Movement Lower Bounds for Affine Programs within the PLDI Research Papers-track
PPoPP 2020	Author of Tutorial: Extending Loop Transformation Frameworks to Irregular Applications within the Workshops and Tutorials-track
PPoPP 2019	PC Member in Program Committee Author of Data-Flow/Dependence Profiling for Structured Transformations within the Main Conference-track
PLDI 2019	Author of Model-Driven Transformations for Multi- and Many-Core CPUs within the PLDI Research Papers-track Author of Generating Piecewise-Regular Code from Irregular Structures within the PLDI Research Papers-track Committee Member in Program Committee within the PLDI Research Papers-track
ICSE 2020	Author of SEQUENCER: Sequence-to-Sequence Learning for End-to-End Program Repair within the Journal First-track
WCIRE 2017	Author of Opening Remarks within the WCIRE 2017-track Moderator of Open Discussion: Building Infrastructure for Research and Education within the WCIRE 2017-track Author of The ROSE Compiler Framework within the WCIRE 2017-track Committee Member in Organizing Committee within the WCIRE 2017-track
FHPC 2017	Committee Member in Program Committee within the FHPC 2017-track
PLDI 2018	Author of GPU Code Optimization using Abstract Kernel Emulation and Sensitivity Analysis within the PLDI Research Papers-track
POPL 2018	Author of Analytical Modeling of Cache Behavior for Affine Programs within the Research Papers-track
PPoPP 2017	Registration Chair in Organizing Committee
GPGPU-9	Author of Effective Resource Management for Enhancing Performance of 2D and 3D Stencils on GPUs within the GPGPU-9-track
PLDI 2017	Financial Chair in Organizing Committee
PLDI 2016	Author of Effective Padding of Multi-Dimensional Arrays to Avoid Cache Conflict Misses within the Research Papers-track
POPL 2016	Author of PolyCheck: Dynamic Verification of Iteration Space Transformations on Affine Programs within the Research Papers-track