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Louis-Noël Pouchet
conf.researchr.org general profile
CC 2020 profile
CC 2021 profile
CC 2022 profile
CC 2023 profile
CC 2024 profile
CC 2025 profile
CGO 2020 profile
CGO 2022 profile
CGO 2025 profile
ICFP 2017 profile
ICSE 2020 profile
PLDI 2016 profile
PLDI 2018 profile
PLDI 2019 profile
PLDI 2020 profile
PLDI 2021 profile
PLDI 2023 profile
PLDI 2024 profile
PLDI 2025 profile
PLDI, ECOOP, Curry On, DEBS, LCTES and ISMM profile
POPL 2016 profile
POPL 2018 profile
PPoPP 2020 profile
PPoPP 2016 profile
PPoPP 2017 profile
PPoPP 2019 profile
PPoPP 2023 profile
PPoPP 2025 profile
SPLASH 2021 profile
SPLASH 2022 profile
SPLASH 2024 profile
Registered user since Thu 1 Dec 2016
Name:
Louis-Noël Pouchet
Country:
United States
Affiliation:
Colorado State University
Contributions
2025
PLDI
Author of Modular Construction and Optimization of the UZP Sparse Format for SpMV on CPUs within the PLDI Research Papers-track
Principles and Practice of Parallel Programming
PC Member in Program Committee within the Main Conference-track
CGO
Committee Member in Program Committee within the Main Conference-track
CC
Artifact Evaluation Chair in Artifact Evaluation Committee
Chair in Steering Committee
Artifact Evaluation Chair in Organizing Committee
Session Chair of Binary Analysis and Hardware II (part of Main Conference)
2024
Vivek Sarkar Festschrift Symposium
Author of Verification of Concurrent Programs Using Hybrid Concrete-Symbolic Interpretation within the VIVEKFEST 2024-track
PLDI
Committee Member in PLDI Review Committee within the PLDI Research Papers-track
CC
Committee Member in Steering Committee
2023
PLDI
Committee Member in PLDI Review Committee within the PLDI Research Papers-track
Principles and Practice of Parallel Programming
PC Member in Program Committee within the Main Conference-track
CC
Session Chair of Optimizations (part of Research Papers)
Steering Committee Member in Steering Committee
2022
SPLASH
Committee Member in Review Committee within the OOPSLA-track
CGO
Author of PALMED: Throughput Characterization for Superscalar Architectures within the Main Conference-track
CC
PC Member in Program Committee within the CC Research Papers-track
Steering Committee Member in Steering Committee
2021
SPLASH
Author of Automated Derivation of Parametric Data Movement Lower Bounds for Affine Programs within the SIGPLAN Papers-track
PLDI
Committee Member in Program Committee within the PLDI-track
CC
Committee Member in Steering Committee
Author of PolyBench/Python: Benchmarking Python Environments with Polyhedral Optimizations within the CC Research Papers-track
Committee Member in Program Committee within the CC Research Papers-track
2020
ICSE
Author of SEQUENCER: Sequence-to-Sequence Learning for End-to-End Program Repair within the Journal First-track
PLDI
Author of Automated Derivation of Parametric Data Movement Lower Bounds for Affine Programs within the PLDI Research Papers-track
CC
General Chair in Organizing Committee
Principles and Practice of Parallel Programming
Author of Tutorial: Extending Loop Transformation Frameworks to Irregular Applications within the Workshops and Tutorials-track
2019
PLDI
Author of Model-Driven Transformations for Multi- and Many-Core CPUs within the PLDI Research Papers-track
Author of Generating Piecewise-Regular Code from Irregular Structures within the PLDI Research Papers-track
Committee Member in Program Committee within the PLDI Research Papers-track
Principles and Practice of Parallel Programming
PC Member in Program Committee
Author of Data-Flow/Dependence Profiling for Structured Transformations within the Main Conference-track
2018
PLDI
Author of GPU Code Optimization using Abstract Kernel Emulation and Sensitivity Analysis within the PLDI Research Papers-track
POPL
Author of Analytical Modeling of Cache Behavior for Affine Programs within the Research Papers-track
2017
FHPNC
Committee Member in Program Committee within the FHPC 2017-track
WCIRE
Author of Opening Remarks within the WCIRE 2017-track
Moderator of Open Discussion: Building Infrastructure for Research and Education within the WCIRE 2017-track
Author of The ROSE Compiler Framework within the WCIRE 2017-track
Committee Member in Organizing Committee within the WCIRE 2017-track
PLDI
Financial Chair in Organizing Committee
Principles and Practice of Parallel Programming
Registration Chair in Organizing Committee
2016
PLDI
Author of Effective Padding of Multi-Dimensional Arrays to Avoid Cache Conflict Misses within the Research Papers-track
GPGPU
Author of Effective Resource Management for Enhancing Performance of 2D and 3D Stencils on GPUs within the GPGPU-9-track
POPL
Author of PolyCheck: Dynamic Verification of Iteration Space Transformations on Affine Programs within the Research Papers-track
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