Sebastian Hack -

Registered user since Fri 14 Nov 2014

Name: Sebastian Hack

Affiliation: Saarland University, Germany

Personal website: http://compilers.cs.uni-saarland.de/people/hack

Research interests: Compilers, Programming Languages, Program Analysis

Contributions

PLDI 2021	Committee Member in Program Committee within the PLDI-track
CC 2021	Committee Member in Steering Committee
POPL 2021	Author of An Abstract Interpretation for SPMD Divergence on Reducible Control Flow Graphs within the POPL-track
WPMVP 2020	Committee Member in Program Committee within the WPMVP 2020-track
CC 2020	Committee Member in Program Committee within the Research Papers-track
PLDI 2020	Author of PMEvo: Portable Inference of Port Mappings for Out-of-Order Processors by Evolutionary Optimization within the PLDI Research Papers-track
WPMVP 2019	Program Committee in Program Committee within the WPMVP 2019-track Author of Multi-dimensional Vectorization in LLVM within the WPMVP 2019-track
WPMVP 2018	Committee Member in Program Committee within the WPMVP 2018-track Author of A Data Layout Transformation for Vectorizing Compilers within the WPMVP 2018-track
SPLASH 2018	Author of AnyDSL: A Partial Evaluation Framework for Programming High-Performance Libraries within the OOPSLA-track
GPCE 2017	Author of RaTrace: Simple and Efficient Abstractions for BVH Ray Traversal Algorithms within the GPCE 2017-track
PLDI 2018	Committee Member in External Review Committee Author of Partial Control-Flow Linearization within the PLDI Research Papers-track
CC 2017	Author of Welcome within the Research Papers-track Program Chair in Organizing Committee Session Chair of Concurrency & Parallelism (part of Research Papers) Session Chair of Welcome (part of Research Papers)
WPMVP 2016	Author of Keynote - AnyDSL: Building Domain-Specific Languages for Productivity and Performance within the WPMVP 2016-track Committee Member in Program Committee within the WPMVP 2016-track
PPoPP 2016	Committee Member in External Review Committee within the Main conference-track
GPCE 2015	Author of Shallow Embedding of DSLs via Online Partial Evaluation within the GPCE-track