Optimal Functional Unit Assignment and Voltage Selection for Pipelined MPSoC with Guaranteed Probability on Time Performance
Pipelined heterogeneous multiprocessor system-on-chip (MPSoC) can provide high throughput for streaming applications. In the design of such systems, time performance and system cost are the most concerning issues. By analyzing runtime behaviors of benchmarks in real-world platforms, we find that execution times of tasks are not fixed but spread with probabilities. In terms of this feature, we model execution times of tasks as random variables. In this paper, we study how to design high-performance and low-cost MPSoC systems to execute a set of such tasks with data dependencies in a pipelined fashion. Our objective is to obtain the optimal functional unit assignment and voltage selection for the pipelined MPSoC systems, such that the system cost is minimized while timing constraints can be met with a given guaranteed probability. For each required probability, our proposed algorithm can efficiently obtain the optimal solution. Experiments show that other existing algorithms cannot find feasible solutions in most cases, but ours can. Even for those solutions that other algorithms can obtain, ours can reach 30% reductions in total cost compared with others.
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15:30 - 17:10: Session 2: Abstraction, Modelling and Scheduling for IoT and Embedded SystemsLCTES 2017 at Vertex WS208 Chair(s): Bernhard ScholzUniversity of Sydney, Australia | |||
15:30 - 15:55 Talk | Optimal Functional Unit Assignment and Voltage Selection for Pipelined MPSoC with Guaranteed Probability on Time Performance LCTES 2017 Weiwen JiangChongqing University, Edwin ShaChongqing University, Qingfeng ZhugeChongqing University, China, Hailiang DongChongqing University, Xianzhang ChenChongqing University | ||
15:55 - 16:20 Talk | Integrated IoT Programming with Selective Abstraction LCTES 2017 | ||
16:20 - 16:45 Talk | Efficient SMT-based LTL Model Checking of Clock Constraint Specification Language for Real-Time and Embedded Systems LCTES 2017 | ||
16:45 - 17:10 Talk | Integrating Task Scheduling and Cache Locking for Multicore Real-time Embedded Systems LCTES 2017 Wenguang Zheng, Hui WuUniversity of New South Wales, Australia, Chuanyao NieThe University of New South Wales |