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LCTES 2017
Wed 21 - Thu 22 June 2017 Barcelona, Spain
co-located with PLDI 2017

Pipelined heterogeneous multiprocessor system-on-chip (MPSoC) can provide high throughput for streaming applications. In the design of such systems, time performance and system cost are the most concerning issues. By analyzing runtime behaviors of benchmarks in real-world platforms, we find that execution times of tasks are not fixed but spread with probabilities. In terms of this feature, we model execution times of tasks as random variables. In this paper, we study how to design high-performance and low-cost MPSoC systems to execute a set of such tasks with data dependencies in a pipelined fashion. Our objective is to obtain the optimal functional unit assignment and voltage selection for the pipelined MPSoC systems, such that the system cost is minimized while timing constraints can be met with a given guaranteed probability. For each required probability, our proposed algorithm can efficiently obtain the optimal solution. Experiments show that other existing algorithms cannot find feasible solutions in most cases, but ours can. Even for those solutions that other algorithms can obtain, ours can reach 30% reductions in total cost compared with others.

Wed 21 Jun

Displayed time zone: Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna change

15:30 - 17:10
Session 2: Abstraction, Modelling and Scheduling for IoT and Embedded SystemsLCTES 2017 at Vertex WS208
Chair(s): Bernhard Scholz University of Sydney, Australia
15:30
25m
Talk
Optimal Functional Unit Assignment and Voltage Selection for Pipelined MPSoC with Guaranteed Probability on Time Performance
LCTES 2017
Weiwen Jiang Chongqing University, Edwin Sha Chongqing University, Qingfeng Zhuge Chongqing University, China, Hailiang Dong Chongqing University, Xianzhang Chen Chongqing University
15:55
25m
Talk
Integrated IoT Programming with Selective Abstraction
LCTES 2017
Gyeongmin Lee POSTECH, Seonyeong Heo POSTECH, Bongjun Kim POSTECH, Jong Kim POSTECH, Hanjun Kim POSTECH
16:20
25m
Talk
Efficient SMT-based LTL Model Checking of Clock Constraint Specification Language for Real-Time and Embedded Systems
LCTES 2017
Min Zhang East China Normal University, Yunhui Ying
16:45
25m
Talk
Integrating Task Scheduling and Cache Locking for Multicore Real-time Embedded Systems
LCTES 2017
Wenguang Zheng , Hui Wu University of New South Wales, Australia, Chuanyao Nie The University of New South Wales