[non-SRC] Towards Ownership Refinement Type Inference with Nested Arrays (APLAS 2024 - Student Research Competition and Posters) - APLAS 2024

Tue 22 - Fri 25 October 2024 Kyoto

Who

Yusuke Fujiwara, Yusuke Matsushita, Kohei Suenaga, Atsushi Igarashi

Track

APLAS 2024 SRC & Posters

Time Zone

The program is currently displayed in (GMT+09:00) Osaka, Sapporo, Tokyo.

Use conference time zone: (GMT+09:00) Osaka, Sapporo, TokyoSelect other time zone

The GMT offsets shown reflect the offsets at the moment of the conference.

Time Band

By setting a time band, the program will dim events that are outside this time window. This is useful for (virtual) conferences with a continuous program (with repeated sessions).
The time band will also limit the events that are included in the personal iCalendar subscription service.

Display full programSpecify a time band

When

Tue 22 Oct 2024 17:09 - 17:16 at The 2nd floor corridor - Poster Session Chair(s): Koko Muroya, Yudai Tanabe

File attachments

extended abstract (APLAS_2024_SRC__Posters_paper_12.pdf)	501KiB
poster (APLAS_2024_SRC__Posters_poster_12.pdf)	1.1MiB

Yusuke Fujiwara

Kyoto University

Yusuke Matsushita

The University of Tokyo

Kohei Suenaga

Graduate School of Informatics, Kyoto University

Japan

Atsushi Igarashi

Kyoto University

Japan

Time Zone

The program is currently displayed in (GMT+09:00) Osaka, Sapporo, Tokyo.

Use conference time zone: (GMT+09:00) Osaka, Sapporo, TokyoSelect other time zone

The GMT offsets shown reflect the offsets at the moment of the conference.

Time Band

By setting a time band, the program will dim events that are outside this time window. This is useful for (virtual) conferences with a continuous program (with repeated sessions).
The time band will also limit the events that are included in the personal iCalendar subscription service.

Display full programSpecify a time band

Session Program

Tue 22 Oct
Displayed time zone: Osaka, Sapporo, Tokyo change

	16:00 - 17:30	Poster SessionSRC & Posters at The 2nd floor corridor Chair(s): Koko Muroya NII, Yudai Tanabe Institute of Science Tokyo

	16:00 6m Poster		[SRC] (Bi-)^3 directional Typing for Answer Type Modification SRC & Posters Takuma Yoshioka Kyoto University File Attached
	16:06 6m Poster		[non-SRC] Disproving Termination of O-like Combinators by Tree Automata SRC & Posters Munehiro Iwami Iwate Prefectural University, Keisuke Nakano Tohoku University File Attached
	16:13 6m Poster		[SRC / Not under award selection] GPU Code Generation for Dynamic Graph Algorithms SRC & Posters Ashwina Kumar IIT Madras, India File Attached
	16:20 6m Poster		[SRC] Implementing a control flow obfuscation tool for Java SRC & Posters Ching Hian Singapore University of Technology and Design, Singapore File Attached
	16:27 6m Poster		[SRC] Improving the WebAssembly Specification Framework for Future Proposals SRC & Posters Yusung Sim Korea Advanced Institute of Science and Technology (KAIST) File Attached
	16:34 6m Poster		[SRC] Lightweight Dependent Types via Staging: Compile-Time Manifest Contracts SRC & Posters Takashi Suwa Kyoto University and National Institute of Informatics File Attached
	16:41 6m Poster		[SRC] On the Equivalence Between Binary and Intermediate Representation Through Filtered-Simulation SRC & Posters Jihee Park Korea Advanced Institute of Science and Technology (KAIST) File Attached
	16:48 6m Poster		[SRC] Refined^2 Environment Classifiers SRC & Posters Yuito Murase Kyoto University, Japan
	16:55 6m Poster		[SRC] Testing and Finding Bugs in Homomorphic Encryption Libraries with Equivalence Partitioning SRC & Posters Hyerin Park KAIST File Attached
	17:02 6m Poster		[non-SRC] Toward a Formalization of Secure-Multiparty Computation Stack SRC & Posters Cheng-Hui Weng Nagoya University, Reynald Affeldt National Institute of Advanced Industrial Science and Technology (AIST), Japan, Jacques Garrigue Nagoya University, Takafumi Saikawa Nagoya University File Attached
	17:09 6m Poster		[non-SRC] Towards Ownership Refinement Type Inference with Nested Arrays SRC & Posters Yusuke Fujiwara Kyoto University, Yusuke Matsushita The University of Tokyo, Kohei Suenaga Graduate School of Informatics, Kyoto University, Atsushi Igarashi Kyoto University File Attached
	17:16 6m Poster		[SRC] Verified Exact Inference for Testing Quantum Circuit Transformers and Simulators SRC & Posters Kanguk Lee KAIST File Attached
	17:23 6m Poster		[SRC] Vython: a Language with Dynamic Version Checking for Gradual Updating SRC & Posters Satsuki Kasuya Institute of Science Tokyo File Attached