[SRC] Verified Exact Inference for Testing Quantum Circuit Transformers and Simulators (APLAS 2024 - Student Research Competition and Posters)

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APLAS 2024 SRC & Posters

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When

Tue 22 Oct 2024 17:16 - 17:23 at The 2nd floor corridor - Poster Session Chair(s): Koko Muroya, Yudai Tanabe
Wed 23 Oct 2024 15:20 - 15:40 at Yamauchi Hall - Finalist Presentation Chair(s): Koko Muroya, Yudai Tanabe

File attachments

extended abstract (APLAS_2024_SRC__Posters_paper_9.pdf)	474KiB
poster (9_poster.pdf)	1.79MiB

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The program is currently displayed in (GMT+09:00) Osaka, Sapporo, Tokyo.

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Session Program

Tue 22 Oct
Displayed time zone: Osaka, Sapporo, Tokyo change

16:00 - 17:30	Poster SessionSRC & Posters at The 2nd floor corridor Chair(s): Koko Muroya NII, Yudai Tanabe Institute of Science Tokyo

16:00 6m Poster		[SRC] (Bi-)^3 directional Typing for Answer Type Modification SRC & Posters Takuma Yoshioka Kyoto University File Attached
16:06 6m Poster		[non-SRC] Disproving Termination of O-like Combinators by Tree Automata SRC & Posters Munehiro Iwami Iwate Prefectural University, Keisuke Nakano Tohoku University File Attached
16:13 6m Poster		[SRC / Not under award selection] GPU Code Generation for Dynamic Graph Algorithms SRC & Posters Ashwina Kumar IIT Madras, India File Attached
16:20 6m Poster		[SRC] Implementing a control flow obfuscation tool for Java SRC & Posters Ching Hian Singapore University of Technology and Design, Singapore File Attached
16:27 6m Poster		[SRC] Improving the WebAssembly Specification Framework for Future Proposals SRC & Posters Yusung Sim Korea Advanced Institute of Science and Technology (KAIST) File Attached
16:34 6m Poster		[SRC] Lightweight Dependent Types via Staging: Compile-Time Manifest Contracts SRC & Posters Takashi Suwa Kyoto University and National Institute of Informatics File Attached
16:41 6m Poster		[SRC] On the Equivalence Between Binary and Intermediate Representation Through Filtered-Simulation SRC & Posters Jihee Park Korea Advanced Institute of Science and Technology (KAIST) File Attached
16:48 6m Poster		[SRC] Refined^2 Environment Classifiers SRC & Posters Yuito Murase Kyoto University, Japan
16:55 6m Poster		[SRC] Testing and Finding Bugs in Homomorphic Encryption Libraries with Equivalence Partitioning SRC & Posters Hyerin Park KAIST File Attached
17:02 6m Poster		[non-SRC] Toward a Formalization of Secure-Multiparty Computation Stack SRC & Posters Cheng-Hui Weng Nagoya University, Reynald Affeldt National Institute of Advanced Industrial Science and Technology (AIST), Japan, Jacques Garrigue Nagoya University, Takafumi Saikawa Nagoya University File Attached
17:09 6m Poster		[non-SRC] Towards Ownership Refinement Type Inference with Nested Arrays SRC & Posters Yusuke Fujiwara Kyoto University, Yusuke Matsushita The University of Tokyo, Kohei Suenaga Graduate School of Informatics, Kyoto University, Atsushi Igarashi Kyoto University File Attached
17:16 6m Poster		[SRC] Verified Exact Inference for Testing Quantum Circuit Transformers and Simulators SRC & Posters Kanguk Lee KAIST File Attached
17:23 6m Poster		[SRC] Vython: a Language with Dynamic Version Checking for Gradual Updating SRC & Posters Satsuki Kasuya Institute of Science Tokyo File Attached

Wed 23 Oct
Displayed time zone: Osaka, Sapporo, Tokyo change

14:00 - 15:40	Finalist PresentationSRC & Posters at Yamauchi Hall Chair(s): Koko Muroya NII, Yudai Tanabe Institute of Science Tokyo

14:00 20m Poster		[SRC] (Bi-)^3 directional Typing for Answer Type Modification SRC & Posters Takuma Yoshioka Kyoto University File Attached
14:20 20m Poster		[SRC] Lightweight Dependent Types via Staging: Compile-Time Manifest Contracts SRC & Posters Takashi Suwa Kyoto University and National Institute of Informatics File Attached
14:40 20m Poster		[SRC] Refined^2 Environment Classifiers SRC & Posters Yuito Murase Kyoto University, Japan
15:00 20m Poster		[SRC] Testing and Finding Bugs in Homomorphic Encryption Libraries with Equivalence Partitioning SRC & Posters Hyerin Park KAIST File Attached
15:20 20m Poster		[SRC] Verified Exact Inference for Testing Quantum Circuit Transformers and Simulators SRC & Posters Kanguk Lee KAIST File Attached

[SRC] Verified Exact Inference for Testing Quantum Circuit Transformers and Simulators

Program Display Configuration

Program Display Configuration

Tue 22 OctDisplayed time zone: Osaka, Sapporo, Tokyo change

Wed 23 OctDisplayed time zone: Osaka, Sapporo, Tokyo change

Kanguk Lee

KAIST

Tue 22 Oct
Displayed time zone: Osaka, Sapporo, Tokyo change

Wed 23 Oct
Displayed time zone: Osaka, Sapporo, Tokyo change