ASE 2024
Sun 27 October - Fri 1 November 2024 Sacramento, California, United States
Wed 30 Oct 2024 15:30 - 15:45 at Camellia - SE for AI 2 Chair(s): Wenxi Wang

Automatic code generation for ML systems has gained popularity with the advent of compiler techniques like Multi-Level Intermediate Representation (Multi-Level IR, or MLIR). State-of-the-art MLIR frontends, including IREE-TF, Torch-MLIR, and ONNX-MLIR, aim to bridge the gap between ML frameworks and low-level hardware architectures through MLIR’s progressive lowering pipeline. However, existing MLIR frontends encounter challenges such as inflexible high-level IR conversion, limited higher-level optimization opportunities, and reduced compatibility and efficiency, leading to software fragmentation and restricting their practical applications within the MLIR ecosystem. To address these challenges, we introduce UFront, a unified MLIR frontend employing a two-stage operator-to-operator compilation workflow. Unlike traditional frontends that compile model source code into binaries step by step with different MLIR transform passes, UFront decouples the process into two distinct stages. It first performs instantaneous model tracing, delegates traced computing nodes as standard DNN operators and transforms models written in different frameworks into unified high-level IR without relying on MLIR passes, enhancing conversion flexibility. Meanwhile, it performs high-level graph optimizations such as constant folding and operator fusion to produce more efficient high-level IR. In the second stage, UFront directly converts high-level IR into standard TOSA IR using proposed lowering patterns, eliminating transform redundancies and ensuring lower-level compatibility with existing ML compiler backends. This two-stage compilation approach enables consistent end-to-end code generation and optimization of various DNN models written in different formats within a single workflow. Extensive experiments on popular DNN models written in various frameworks demonstrate that UFront exhibits higher compatibility, faster end-to-end compilation, and is capable of producing more efficient binary execution compared to SOTA works.

Wed 30 Oct

Displayed time zone: Pacific Time (US & Canada) change

15:30 - 16:30
SE for AI 2NIER Track / Research Papers at Camellia
Chair(s): Wenxi Wang University of Virgina
15:30
15m
Talk
UFront: Toward A Unified MLIR Frontend for Deep Learning
Research Papers
Guoqing Bao Shanghai Enflame Technology Co., Ltd., Heng Shi Shanghai Jiao Tong University, Shanghai Enflame Technology Co., Ltd., Chengyi Cui Shanghai Enflame Technology Co., Ltd., Yalin Zhang Shanghai Enflame Technology Co., Ltd., Jianguo Yao Shanghai Jiao Tong University; Shanghai Enflame Technology
15:45
15m
Talk
FIPSER: Improving Fairness Testing of DNN by Seed Prioritization
Research Papers
Junwei Chen East China Normal University, Yueling Zhang East China Normal University, Lingfeng Zhang East China Normal University, Min Zhang East China Normal University, Chengcheng Wan East China Normal University, Ting Su East China Normal University, Geguang Pu East China Normal University, China
16:00
15m
Talk
Prioritizing Test Inputs for DNNs Using Training Dynamics
Research Papers
Jian Shen Nanjing University, Zhong Li , Minxue Pan Nanjing University, Xuandong Li Nanjing University
16:15
15m
Talk
Learning DNN Abstractions using Gradient DescentRecorded Talk
NIER Track
Diganta Mukhopadhyay TCS Research, Pune, India, Sanaa Siddiqui Indian Institute of Technology Delhi, New Delhi, India, Hrishikesh Karmarkar TCS Research, Kumar Madhukar Indian Institute of Technologiy Delhi, New Delhi, India, Guy Katz The Hebrew University of Jerusalem