DLS
Sun 15 - Fri 20 November 2020 Online Conference
co-located with SPLASH 2020
Thu 19 Nov 2020 06:00 - 06:20 at SPLASH-III - 5 Chair(s): Xavier Rival, Sukyoung Ryu
Wed 18 Nov 2020 18:00 - 18:20 at SPLASH-III - 5 Chair(s): Patrick Cousot, Sukyoung Ryu

Execution times may be reduced by offloading parallel loop nests to a GPU. Auto-parallelizing compilers are common for static languages, often using a cost model to determine when the GPU execution speed will outweigh the offload overheads. Nowadays scientific software is increasingly written in dynamic languages and would benefit from compute accelerators. The
ALPyNA framework analyses moderately complex Python loop nests and automatically JIT compiles code for heterogeneous CPU and GPU architectures.

We present the first analytical cost model for auto-parallelizing loop nests in a dynamic language on heterogeneous architectures. Predicting execution time in a language like Python is extremely challenging, since aspects like the element types, size of the iteration space, and amenability to parallelization can only be determined at runtime. Hence the cost model must be both staged, to combine compile and run-time information, and lightweight to minimize runtime overhead. GPU execution time prediction must account for factors like data transfer, block-structured execution, and starvation.

We show that a comparatively simple, staged analytical model can accurately determine during execution when it is profitable to offload a loop nest. We evaluate our model on three heterogeneous platforms across 360 experiments with 12 loop-intensive Python benchmark programs. The results show small misprediction intervals and a mean slowdown of just 13.6%, relative to the optimal (oracular) offload strategy.

Wed 18 Nov
Times are displayed in time zone: Central Time (US & Canada) change

17:00 - 18:20: 5SAS / DLS 2020 at SPLASH-III +12h
Chair(s): Patrick CousotNew York University, Sukyoung Ryu
17:00 - 17:20
Research paper
SAS
Matthew SotoudehUniversity of California, Davis, Aditya V. ThakurUniversity of California, Davis
Pre-print Media Attached
17:20 - 17:40
Talk
DLS 2020
Yusuke IzawaTokyo Institute of Technology, Hidehiko MasuharaTokyo Institute of Technology
Link to publication DOI Pre-print Media Attached
17:40 - 18:00
Research paper
SAS
Ravi MangalGeorgia Institute of Technology, Kartik SarangmathGeorgia Institute of Technology, Aditya Nori, Alessandro OrsoGeorgia Tech
Pre-print Media Attached
18:00 - 18:20
Talk
DLS 2020
Dejice JacobUniversity of Glasgow, UK, Phil TrinderUniversity of Glasgow, Jeremy SingerGlasgow University
Link to publication DOI Pre-print Media Attached

Thu 19 Nov
Times are displayed in time zone: Central Time (US & Canada) change

05:00 - 06:20: 5SAS / DLS 2020 at SPLASH-III
Chair(s): Xavier RivalINRIA/CNRS/ENS Paris, Sukyoung Ryu
05:00 - 05:20
Research paper
SAS
Matthew SotoudehUniversity of California, Davis, Aditya V. ThakurUniversity of California, Davis
Pre-print Media Attached
05:20 - 05:40
Talk
DLS 2020
Yusuke IzawaTokyo Institute of Technology, Hidehiko MasuharaTokyo Institute of Technology
Link to publication DOI Pre-print Media Attached
05:40 - 06:00
Research paper
SAS
Ravi MangalGeorgia Institute of Technology, Kartik SarangmathGeorgia Institute of Technology, Aditya Nori, Alessandro OrsoGeorgia Tech
Pre-print Media Attached
06:00 - 06:20
Talk
DLS 2020
Dejice JacobUniversity of Glasgow, UK, Phil TrinderUniversity of Glasgow, Jeremy SingerGlasgow University
Link to publication DOI Pre-print Media Attached