Tue 18 Jul 2023 14:30 - 15:00 at Oak - TAP Session 2: Low-level code verification Chair(s): Julien Signoles
This short paper reports on how we combine tests and formal proofs while developing extensions to the CompCert formally verified compiler. The paper illustrates that even a formally verified software may still need extensive testing.
Tue 18 JulDisplayed time zone: London change
Tue 18 Jul
Displayed time zone: London change
13:30 - 15:00 | TAP Session 2: Low-level code verificationResearch Papers at Oak Chair(s): Julien Signoles Université Paris-Saclay, CEA, List Remote Participants: Zoom Link | ||
13:30 30mTalk | BIRD: A Binary Intermediate Representation for formally verified Decompilation of x86-64 binaries Research Papers P: Daniel Engel Open University Of The Netherlands, Freek Verbeek Open University of the Netherlands, The Netherlands, Binoy Ravindran Virginia Tech DOI Pre-print File Attached | ||
14:00 30mTalk | Low-level Reachability Analysis based on Formal Logic Research Papers P: Nico Naus Virginia Tech, Freek Verbeek Open University of the Netherlands, The Netherlands, Marc Schoolderman Radboud University Nijmegen, Binoy Ravindran Virginia Tech DOI Pre-print | ||
14:30 30mTalk | Testing a Formally Verified Compiler Research Papers P: David Monniaux CNRS/VERIMAG, Léo Gourdin Université Grenoble Alpes, Verimag, Sylvain Boulmé Grenoble Alps University / CNRS / Grenoble INP / VERIMAG, Olivier Lebeltel Université Grenoble Alpes, CNRS, Verimag DOI Pre-print |