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VEE 2017
Sat 8 - Sun 9 April 2017 Xi'an, China
Sun 9 Apr 2017 11:15 - 11:45 at Zhu Que Room - Performance Chair(s): Paolo Bonzini

Current computer architectures - ARM, MIPS, PowerPC, SPARC, x86 - have evolved from a 32-bit architecture to a 64-bit one. Computer architects often consider whether it could be possible to eliminate hardware support for a subset of the instruction set as to reduce hardware complexity, which could improve performance, reduce power usage and accelerate processor development. This paper considers the scenario where we want to eliminate 32-bit hardware support from the ARMv8 architecture.

Dynamic binary translation can be used for this purpose and generally comes in one of two forms: application-level translators that translate a single user mode process on top of a native operating system, and system-level translators that translate an entire operating system and all its processes.

Application-level translators can have good performance but is not totally transparent; system-level translators may be 100% compatible but performance suffers. HyperMAMBO uses a new approach that gets the best of both worlds, being able to run the translator as an application under the hypervisor but still react to the behavior of guest operating systems. It works with complete transparency with regards to the virtualized system whilst delivering performance close to that provided by hardware execution.

A key factor in the low overhead of HyperMAMBO is its deep integration with the virtualization and memory management features of ARMv8. These are exploited to support caching of translations across multiple address spaces while ensuring that translated code remains consistent with the source instructions it is based on. We show how these attributes are achieved without sacrificing either performance or accuracy.

Presentation Slides (Antras_final_presentation.pdf)742KiB

Conference Day
Sun 9 Apr

Displayed time zone: Azores change

10:45 - 12:15
PerformanceSession 6 at Zhu Que Room
Chair(s): Paolo BonziniRed Hat, Inc.
Content Look-Aside Buffer for Redundancy-Free Virtual Disk I/O and Caching
Session 6
Chun YangPeking University, China, Xianhua LiuPeking University, China, Xu ChengPeking University, China
HyperMAMBO-X64: Using Virtualization to Support High-Performance Transparent Binary Translation
Session 6
Amanieu d'AntrasUniversity of Manchester, Cosmin GorgovanUniversity of Manchester, Jim GarsideUniversity of Manchester, John GoodacreUniversity of Manchester, Mikel Luján
File Attached
HA-VMSI: A Lightweight Virtual Machine Isolation Approach with Commodity Hardware for ARM
Session 6
Min ZhuInstitute of Information Engineering, Chinese Academy of Sciences, Bibo TuInstitute of Information Engineering, Chinese Academy of Sciences, Wei WeiInstitute of Information Engineering, Chinese Academy of Sciences, Dan MengInstitute of Information Engineering, Chinese Academy of Sciences