Registered user since Sun 26 Aug 2018
Prof. Saman Amarasinghe leads the Commit compiler research group in MIT’s Computer Science & Artificial Intelligence Laboratory (CSAIL), which focuses on programming languages and compilers that maximize application performance on modern computing platforms. He is a world leader in the field of high-performance domain-specific languages. Prof. Amarasinghe’s group developed the Halide, TACO, Simit, StreamIt, StreamJIT, PetaBricks, MILK, Cimple, and GraphIt domain-specific languages and compilers, all of which combine language design and sophisticated compilation techniques to deliver unprecedented performance for targeted application domains such as image processing, stream computations, and graph analytics. Dr. Amarasinghe also pioneered the application of machine learning for compiler optimizations, from Meta optimization in 2003 to OpenTuner extendable autotuner today. With professor Anant Agarwal, he co-led the Raw architecture project, which did pioneering work on scalable multicores. Prof. Amarasinghe’s entrepreneurship activities include founding Determina, Inc. (acquired by VMWare) based on computer security research pioneered in his research group at MIT and co-founding Lanka Internet Services, Ltd., the first Internet Service Provider in Sri Lanka. Prof. Amarasinghe is also the faculty director of MIT Global Startup Labs, whose summer programs in 17 countries have helped to create more than 20 thriving startups. Prof. Amarasinghe developed the popular Performance Engineering of Software Systems (6.172) class with Professor Charles Leiserson. He also created individualized software project classes such as the Open Source Software Project Lab, the Open Source Entrepreneurship Lab, and the Bring Your Own Software Project Lab.
Contributions
2024
Sparse
2023
Sparse
2022
CGO
- Committee Member in Program Committee within the Main Conference-track
- Author of Unified Compilation for Lossless Compression and Sparse Computing within the Main Conference-track
- Author of GraphIt to CUDA compiler in 2021 LOC: A case for high-performance DSL implementation via staging with BuilDSL within the Main Conference-track
Principles and Practice of Parallel Programming
2021
2020
SPLASH
2019
2018
SPLASH
- Author of goSLP: Globally Optimized Superword Level Parallelism Framework within the OOPSLA-track
- Author of goSLP: globally optimized Superword Level Parallelism framework within the Posters-track
- Author of GraphIt - A High-Performance Graph DSL within the Posters-track
- Author of GraphIt - A High-Performance Graph DSL within the OOPSLA-track
- Author of Unified Sparse Formats for Tensor Algebra Compilers within the Artifacts-track
- Author of GraphIt - A High-Performance Graph DSL within the Artifacts-track
- Author of Format Abstraction for Sparse Tensor Algebra Compilers within the OOPSLA-track
- Author of goSLP: Globally Optimized Superword Level Parallelism Framework within the Artifacts-track
- Author of Format Abstraction for Sparse Tensor Algebra Compilers within the Posters-track
2016
Principles and Practice of Parallel Programming
2015
PLDI
- Author of Helium: Lifting High-Performance Stencil Kernels from Stripped x86 Binaries to Halide DSL Code within the Research Papers-track
- Committee Member in External Review Committee within the Research Papers-track
- Author of AutoTune:Autotuning programs with OpenTuner within the Tutorials-track
- Author of Autotuning Algorithmic Choice for Input Sensitivity within the Research Papers-track