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LCTES 2017
Wed 21 - Thu 22 June 2017 Barcelona, Spain
co-located with PLDI 2017

Software-Defined Networking (SDN) allows control applications to install fine-grained forwarding policies in the underlying switches. Ternary Content Addressable Memory (TCAM) enables fast lookups in hardware switches with flexible wildcard rule patterns. However, the performance of packet processing is severely constrained by the capacity of TCAM, aggravating the processing burden and latency issues. In this paper, we propose a hybrid TCAM architecture which consists of NVM-based TCAM (nvTCAM) and SRAM-based TCAM (sTCAM), utilizing nvTCAM to cache the most popular rules to improve cache-hit-ratio while relying on a very small-size sTCAM to handle cache-miss traffic to effectively decrease update latency. Considering the special rule dependency, we present a Rule Migration Replacement Algorithm to effectively make full utilization of both nvTCAM and sTCAM to obtain better performance. Experimental results show our proposed architecture outperforms current TCAM architectures.

Thu 22 Jun
Times are displayed in time zone: (GMT+02:00) Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna change

10:30 - 12:10: LCTES 2017 - Session 3: Non-Volatile Memory/Processor and RTOS at Vertex WS208
Chair(s): Hanjun KimPOSTECH
LCTES-2017-papers10:30 - 10:55
Yi WangShenzhen University, Mingxu ZhangShenzhen University, Jing YangHarbin Institute of Technology
LCTES-2017-papers10:55 - 11:20
Xianzhong DingShandong University, Zhiyong ZhangShandong University, Zhiping JiaShandong University, Lei JuShandong University, Mengying ZhaoShandong University, Huawei HuangThe University of Aizu
LCTES-2017-papers11:20 - 11:45
Chen Pan, Mimi XieOklahoma State University, Yongpan LiuTsinghua University, Yanzhi WangSyracuse University, Jason XueCity University of Hong Kong, China, Yiran ChenUniversity of Pittsburgh, Jingtong HuOklahoma State University
LCTES-2017-papers11:45 - 12:10
Christian Dietrich, Daniel LohmannFriedrich-Alexander-Universität, Germany