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LCTES 2018
co-located with PLDI 2018

We propose and evaluate a framework to test the functional correctness of coarse-grained reconfigurable array (CGRA) processors for pre-silicon verification and post-silicon validation. To reflect the reconfigurable nature of CGRAs, an architectural model of the system under test is built directly from the hardware description files. A guided place-and-routing algorithm is used to map operations and operands onto the heterogeneous processing elements (PE). Test coverage is maximized by favoring unexercised parts of the architecture. Requiring no explicit knowledge about the semantics of operations, the random test program generator (RTPG) framework seamlessly supports custom ISA extensions. The proposed framework is applied to the Samsung Reconfigurable Processor, a modulo-scheduled CGRA integrated in smartphones, cameras, printers, and smart TVs. Experiments demonstrate that the RTPG is versatile, efficient, and quickly achieves a high coverage. In addition to detecting all randomly inserted faults, the generated test programs also exposed two yet unknown actual faults in the architecture.

Tue 19 Jun

Displayed time zone: Eastern Time (US & Canada) change

14:00 - 15:40
Full paper session on Adaptation and HardwareLCTES 2018 at Discovery AB
14:00
25m
Full-paper
Adaptive Deep Learning Model Selection on Embedded Systems
LCTES 2018
Ben Taylor Lancaster University, UK, Vicent Sanz Marco Lancaster University, Willy Wolff Lancaster University, Yehia Elkhatib Lancaster University, Zheng Wang Lancaster University
14:25
25m
Full-paper
Optimizing RAID/SSD Controllers with Lifetime Extension for Flash-based SSD Array
LCTES 2018
Lei Han , Zhaoyan Shen The Hong Kong Polytechnic University, Zili Shao The Hong Kong Polytechnic University, Tao Li University of Florida
14:50
25m
Full-paper
Verification of Coarse-Grained Reconfigurable Arrays through Random Test Programs
LCTES 2018
Bernhard Egger Seoul National University, Eunjin Song Seoul National University, Hochan Lee Seoul National University, Daeyoung Shin Seoul National University
15:15
25m
Full-paper
Decoupling Address Generation from Loads and Stores to Improve Data Access Energy Efficiency
LCTES 2018
Michael Stokes Florida State University, Ryan Baird Florida State University, Zhaoxiang Jin Michigan Technological University, David B. Whalley , Soner Onder Michigan Technological University