PMAM 2016
Sat 12 - Sun 13 March 2016 Barcelona, Spain
co-located with PPoPP 2016

Rapid advancements in multicore and chip-level multi-threading technologies open new challenges and make multicore and manycore systems a part of the computing landscape. From high-end servers to mobile phones, multicores and manycores are steadily entering every single aspect of the information technology.

However most programmers are trained in sequential programming, yet most existing parallel programming models are prone to errors such as data race and deadlock. Therefore to fully utilise multicore and manycore hardware, parallel programming models that allow easy transition of sequential programs to parallel programs with good performance and enable development of error-free codes are urgently needed.

This workshop is dedicated primarily to gather researchers and practitioners addressing the main challenges and share experiences in the emerging multicore and manycore software engineering and distributed programming paradigm. This workshop aims to provide a discussion forum for people interested in programming environments, models, tools and applications specifically designed for parallel multicore and manycore hardware environments.

The program committee cordially invites any novel research ideas in the following (but not limited to) topics:

  • programming models and systems for multicore, manycore, and clusters of multicore/manycore
  • multicore and manycore software engineering
  • parallel and distributed algorithms on GPU and multicore clusters
  • parallel libraries and frameworks
  • performance analysis, efficiency and effectiveness
  • massively parallel processing on multicore/manycore systems and clusters
  • automated parallelization and compilation techniques
  • debugging and performance autotuning tools and techniques for multicore/manycore applications
  • parallel algorithms, applications and benchmarks on multicore/manycore systems
  • runtime power/energy management on multicore/manycore systems and clusters
  • fault tolerance and resilience

Here are the photos from the PMAM 2016 workshop:

https://flic.kr/s/aHskxjKtHt

Accepted Papers

Title
Accelerating Dynamic Data Race Detection Using Static Thread Interference Analysis
PMAM 2016
An Evaluation of Emerging Many-Core Parallel Programming Models
PMAM 2016
Discovering pipeline parallel patterns in sequential legacy C++ codes
PMAM 2016
Efficient Parallelization of Complex Automotive Systems
PMAM 2016
Embedding Semantics of the Single-Producer/Single-Consumer Lock-Free Queue into a Race Detection Tool
PMAM 2016
Enhancing Metaheuristic-based Virtual Screening Methods on Massively Parallel and Heterogeneous Systems
PMAM 2016
Flow Driven GPGPU Programming combining Textual and Graphical Programming
PMAM 2016
JParEnt: Parallel Entropy Decoding for JPEG Decompression on Heterogeneous Multicore Architectures
PMAM 2016
Multi-GPU implementation of the Horizontal Diffusion method of the Weather Research and Forecast Model
PMAM 2016
Multitasking Real-time Embedded GPU Computing Tasks
PMAM 2016
On Guided Installation of Basic Linear Algebra Routines in Nodes with Manycore Components
PMAM 2016
Parallel Locality and Parallelization Quality
PMAM 2016
Software-managed Cache Coherence for fast One-Sided Communication
PMAM 2016

Call for Papers

Objectives, scope and optics of the workshop

The program committee cordially invites any novel research ideas in the following (but not limited to) topics:

  • programming models and systems for multicore, manycore, and clusters of multicore/manycore
  • multicore and manycore software engineering
  • parallel and distributed algorithms on GPU and multicore clusters
  • parallel libraries and frameworks
  • performance analysis, efficiency and effectiveness
  • massively parallel processing on multicore/manycore systems and clusters
  • automated parallelization and compilation techniques
  • debugging and performance autotuning tools and techniques for multicore/manycore applications
  • parallel algorithms, applications and benchmarks on multicore/manycore systems
  • runtime power/energy management on multicore/manycore systems and clusters
  • fault tolerance and resilience

Manuscript Submission

Papers reporting original and unpublished research results and experience are solicited. All paper submissions will be handled electronically via EasyChair.

http://www.easychair.org/conferences/?conf=pmam2016

Papers must not exceed 10 pages in standard ACM two-column conference format (preprint mode, with page number and the 9pt template). Templates for ACM format are available for Microsoft Word, and LaTeX at here.

Authors must register and submit their paper through the online submission system. If you have problems accessing the system, e-mail your submission to:

pmam2016 at cs dot otago dot ac dot nz

Proceedings

Accepted papers will be published in the ACM Digital Library, and will be included in the Elsevier databases Scopus and Compendex (EI indexed).

Selected best papers of PMAM will be considered for publication in a special issue of Concurrency and Computation: Practice and Experience or The International Journal of High Performance Computing Applications.

Travel Awards

Student authors who present papers in this workshop are eligible to apply for travel awards. Further details will be announced after notification of acceptance.

You're viewing the program in a time zone which is different from your device's time zone - change time zone

Sat 12 Mar
Times are displayed in time zone: Greenwich Mean Time : Belfast change

09:00 - 10:30
Session 1PMAM 2016 at Mallorca
Chair(s): Kai-Cheung LeungThe University of Auckland
09:00
10m
Day opening
Opening Remarks
PMAM 2016
C: Kai-Cheung LeungThe University of Auckland
09:10
60m
Talk
Keynote: From the Latency to the Throughput Age
PMAM 2016
K: Jesus Labarta ManchoBarcelona Supercomputing Center
File Attached
10:10
20m
Talk
An Evaluation of Emerging Many-Core Parallel Programming Models
PMAM 2016

Dr. Pavan Balaji

Dr. Pavan Balaji holds appointments as a Computer Scientist and Group Lead at the Argonne National Laboratory, as an Institute Fellow of the Northwestern-Argonne Institute of Science and Engineering at Northwestern University, and as a Research Fellow of the Computation Institute at the University of Chicago. He leads the Programming Models and Runtime Systems group at Argonne. His research interests include parallel programming models and runtime systems for communication and I/O on extreme-scale supercomputing systems, modern system architecture, cloud computing systems, data-intensive computing, and big-data sciences. He has nearly 150 publications in these areas and has delivered nearly 150 talks and tutorials at various conferences and research institutes.

Dr. Balaji is a recipient of several awards including the U.S. Department of Energy Early Career award in 2012, TEDxMidwest Emerging Leader award in 2013, Crain’s Chicago 40 under 40 award in 2012, Los Alamos National Laboratory Director’s Technical Achievement award in 2005, Ohio State University Outstanding Researcher award in 2005, six best paper awards, one best paper finalist, and one best poster finalist. He has served as a chair or editor for nearly 50 journals, conferences and workshops, and as a technical program committee member in numerous conferences and workshops. He is a senior member of the IEEE and a professional member of the ACM. More details about Dr. Balaji are available at:

http://www.mcs.anl.gov/~balaji

Dr. Kai-Cheung Leung

Dr. Kai-Cheung Leung is a Research Scientist in the Department of Computer Science at the University of Auckland, New Zealand. He received his PhD in 2013 in Computer Science from the University of Otago, New Zealand. From 2013 to 2014, he worked as a postdoctoral fellow, where he collaborated with companies such as Areo on improving 3D terrain reconstruction algorithms with distributed and manycore technologies. Currently he is working in projects including stereoscopic vision and real-time object recognition. Dr. Leung’s main interests include parallel/distributed computing, cluster computing, multicore systems, distributed shared memory, transactional memory and high-performance computing.