MODELS 2022
Sun 23 - Fri 28 October 2022 Montréal, Canada
Wed 26 Oct 2022 13:30 - 13:52 at A-4502.1 - Applications I Chair(s): Joanne M. Atlee

Models - at different levels of abstraction and pertaining to different engineering views - are central in the design of railway networks, in particular signalling systems. The design of such systems must follow numerous strict rules, which may vary from project to project and require information from different views. This renders manual verification of railway networks costly and error-prone.

This paper presents EVEREST, a tool for automating the verification of railway network models that preserves the loosely coupled nature of the design process. To achieve this goal, EVEREST first combines two different views of a railway network model - the topology provided in signalling diagrams containing the functional infrastructure, and the precise coordinates of the elements provided in technical drawings (CAD) - in a unified model stored in the railML standard format. This railML model is then verified against a set of user-defined topological rules, written in a custom modal logic that simplifies the specification of spatial constraints in the network. The violated rules can be visualized both in the signalling diagrams and technical drawings, where the element(s) responsible for the violation are highlighted.

Wed 26 Oct

Displayed time zone: Eastern Time (US & Canada) change

13:30 - 15:00
Applications ITechnical Track / Journal-first at A-4502.1
Chair(s): Joanne M. Atlee University of Waterloo
13:30
22m
Talk
Verification of Railway Network Models with EVERESTP&I
Technical Track
João Martins EFACEC, José M. Fonseca EFACEC, Rafael Costa INESC TEC, José Creissac Campos University of Minho & HASLab/INESC TEC, Alcino Cunha University of Minho; INESC TEC, Nuno Macedo University of Porto; INESC TEC, Jose Nuno Oliveira University of Minho; INESC TEC
13:52
22m
Talk
Bug Localization in Game Software Engineering: Evolving Simulations to Locate Bugs in Software Models of Video GamesFT
Technical Track
Rodrigo Casamayor SVIT Research Group. Universidad San Jorge, Lorena Arcega San Jorge University, Francisca Pérez SVIT Research Group. Universidad San Jorge, Carlos Cetina San Jorge University, Spain
14:15
22m
Talk
SOCAM: a service-oriented computing architecture modeling methodJ1st
Journal-first
Link to publication
14:37
22m
Talk
A Comprehensive Framework for the Analysis of Automotive SystemsP&I
Technical Track
Alessandro Cimatti Fondazione Bruno Kessler, Sara Corfini Huawei Pisa Research Center, Luca Cristoforetti Fondazione Bruno Kessler, Marco Di Natale Scuola Superiore Sant'Anna (Consultant for Huawei Pisa Research Center), Alberto Griggio Fondazione Bruno Kessler, Stefano Puri Huawei Pisa Research Center, Stefano Tonetta Fondazione Bruno Kessler, Italy