Localizing Faults in Simulink/Stateflow Models with STL
Fault-localization is considered to be a very tedious and time-consuming activity in the design of complex Cyber-Physical Systems (CPS). This laborious task essentially requires expert knowledge of the system in order to discover the cause of the fault. In this context, we propose a new procedure that aids designers in debugging Simulink/Stateflow hybrid system models, guided by Signal Temporal Logic (STL) specifications. The proposed method relies on three main ingredients: (1) a monitoring and a trace diagnostics procedure that checks whether a tested behavior satisfies or violates an STL specification, localizes time segments and interfaces variables contributing to the property violations; (2) a slicing procedure that maps these observable behavior segments to the internal states and transitions of the Simulink model; and (3) a spectrum-based fault-localization method that combines the previous analysis from multiple tests to identify the internal states and/or transitions that are the most likely to explain the fault. We demonstrate the applicability of our approach on two Simulink models from the automotive and the avionics domain.
Sat 6 AprDisplayed time zone: Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna change
16:00 - 18:00 | Cyber-Physical Systems designMeTRiD at S510 Chair(s): Valeriy Vyatkin Aalto University, Finland and Luleå University of Technology, Sweden | ||
16:00 40mTalk | Localizing Faults in Simulink/Stateflow Models with STL MeTRiD Ezio Bartocci Technische Universität Wien, Thomas Ferrère IST Austria, Niveditha Manjunath Austrian Institute of Technology, Dejan Nickovic Austrian Institute of Technology | ||
16:40 40mTalk | Model-based energy characterization of IoT system design aspects MeTRiD Alexios Lekidis Aristotle University of Thessaloniki | ||
17:20 40mTalk | Modeling and Simulation of Attacks on Cyber-physical Systems MeTRiD Cinzia Bernardeshi Univ. of Pisa |