ETAPS 2019
Sat 6 - Thu 11 April 2019 Prague, Czech Republic
Natasha Sharygina

Registered user since Sun 7 Apr 2019

Name:Natasha Sharygina
Bio:

Natasha Sharygina is a Full Professor of Computer Science at the University of Lugano, Switzerland. Prof. Sharygina received a Ph.D. degree from the University of Texas at Austin, USA in 2002. Her professional experience includes a visiting professor position at Imperial college, London, UK in 2018, a research faculty position at Carnegie Mellon University, SEI in 2002-2005 and consulting at Bell Labs, Lucent Technologies at the Computing Sciences Research in 2000-2001. Prof. Sharygina directs the USI Formal Verification and Security group whose research deals with improving the program development process through formal methods of specification and verification. Prof. Sharygina´s interests lie in software and hardware verification, temporal logics, model checking, SAT/SMT methods, and concurrent and distributed computing. Prof. Sharygina´s current focus is on applying automated formal methods to problems in computer security, electronic design automation, and program analysis. Prof. Sharygina is the recipient of various awards among which are the ACM recognition of service award and CMU Technical Excellence awards. Prof. Sharygina´s research has been funded by multiple grants from the Swiss National Foundation, EU Research and Innovation programs, EU cooperation in science and technology projects, Hasler Foundation and TASSO career awards. Prof. Sharygina has authored more than 150 research papers in areas of formal verification, and system design. She served on program committees of various major conferences in the field of computer-aided verification (e.g., CAV, TACAS, FMCAD, SPIN), given keynote and invited presentations, and co-chaired highly competitive international conferences and symposia such as FMCAD 2010 and CAV 2013.

Country:Switzerland
Affiliation:USI Lugano, Switzerland
Research interests:Program Verification, Decision Procedures for First-order Theories, SMT

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