ETAPS 2019
Sat 6 - Thu 11 April 2019 Prague, Czech Republic
Tue 9 Apr 2019 12:00 - 12:30 at JUPITER - Software Verification I Chair(s): Wil van der Aalst

We propose E↓-logic as a formal foundation for the specification and development of event-based systems with local data states. The logic is intended to cover a broad range of abstraction levels from abstract requirements specifications up to constructive specifications. Our logic uses diamond and box modalities over regular expressions of actions adopted from dynamic logic. Atomic actions are pairs e / ψ where e is an event and ψ a state transition predicate. To write concrete specifications of recursive process structures we integrate state variables and binders of hybrid logic. The semantic interpretation relies on event/data transition systems; specification refinement is defined by model class inclusion. For the presentation of constructive specifications we propose operational event/data specifications allowing for familiar, diagrammatic representations by state transition graphs. We show that E↓-logic is powerful enough to characterise the semantics of an operational specification by a single E ↓ -sentence. Thus the whole development process can rely on E↓-logic and its semantics as a common basis. This includes also a variety of implementation constructors to support, among others, event refinement and parallel composition.

Tue 9 Apr

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10:30 - 12:30
Software Verification IFASE at JUPITER
Chair(s): Wil van der Aalst RWTH Aachen
10:30
30m
Talk
Tool Support for Correctness-by-Construction
FASE
Tobias Runge TU Braunschweig, Ina Schaefer Technische Universität Braunschweig, Loek Cleophas Eindhoven University of Technology (TU/e) and Stellenbosch University (SU), Thomas Thüm University of Ulm, Derrick Kourie Stellenbosch University, Bruce W Watson
Link to publication
11:00
30m
Talk
Automatic Modeling for Opaque Code in JavaScript Static Analysis
FASE
Joonyoung Park , Alexander Jordan Oracle Labs, Australia, Sukyoung Ryu KAIST, South Korea
Link to publication
11:30
30m
Talk
SMT-Based Bounded Schedulability Analysis of the Clock Constraint Specification Language
FASE
Min Zhang East China Normal University, Fu Song , Frederic Mallet Université Côte d'Azur, France, Xiaohong Chen
Link to publication
12:00
30m
Talk
A Hybrid Dynamic Logic for Event/Data-based SystemsBest paper nomination
FASE
Rolf Hennicker Ludwig Maximilians University Munich, Germany, Alexandre Madeira , Alexander Knapp
Link to publication