This program is tentative and subject to change.
Reactive synthesis is an automated procedure to obtain a correct-by-construction reactive system from its temporal logic specification. Despite significant research progress over the past few decades, reactive synthesis is still in its early stages of practical adoption. One significant barrier to using reactive synthesis outside academia is the long realizability checking and synthesis time of specifications.
This paper introduces a novel, evolution-aware approach for realizability checking. Our approach leverages the key observation that realizability checking is an operation that developers frequently perform during iterative specification development; therefore, utilizing intermediate data from previous realizability checks can substantially improve running times. Our approach computes a local semantic diff between previous and current versions of the specification, and, based on the diff and the previous realizability checking result, applies a set of sound heuristics. These heuristics reuse intermediate data collected during the original specification’s realizability checking to accelerate the evolved specification’s realizability checking. Our evaluation demonstrates that these heuristics are applicable in 70% of cases from a real-world dataset containing thousands of specifications, and that their application significantly improves the running time of realizability checking.
This program is tentative and subject to change.
Tue 18 NovDisplayed time zone: Seoul change
11:00 - 12:30 | |||
11:00 10mTalk | SMTgazer: Learning to Schedule SMT Algorithms via Bayesian Optimization Research Papers Chuan Luo Beihang University, Shaoke Cui Beihang University, Jianping Song Beihang University, Xindi Zhang State Key Laboratory of Computer Science, Institute of Software, Chinese Academy of Sciences, China, Wei Wu Central South University; Xiangjiang Laboratory, Chanjuan Liu Dalian University of Technology, Shaowei Cai Institute of Software at Chinese Academy of Sciences, Chunming Hu Beihang University | ||
11:10 10mTalk | Efficient and Verifiable Proof Logging for MaxSAT Solving Research Papers | ||
11:20 10mTalk | Destabilizing Neurons to Generate Challenging Neural Network Verification Benchmarks Research Papers | ||
11:30 10mTalk | RELIA: Accelerating Analysis of Cloud Access Control Policies Research Papers Dan Wang Xi'an Jiaotong University, Peng Zhang Xi'an Jiaotong University, Zhenrong Gu Xi'an Jiaotong University, Weibo Lin Huawei Cloud, Shibiao Jiang Huawei Cloud, Zhu He Huawei Cloud, Xu Du Huawei Cloud, Longfei Chen Huawei Cloud, Jun Li Huawei, Xiaohong Guan Xi'an Jiaotong University | ||
11:40 10mTalk | Evolution-Aware Heuristics for GR(1) Realizability Checking Research Papers Dor Ma'ayan Tel Aviv University, Shahar Maoz Tel Aviv University, Jan Oliver Ringert Bauhaus-University Weimar | ||
11:50 10mTalk | Programmers’ Visual Attention on Function Call Graphs During Code Summarization Research Papers Samantha McLoughlin Vanderbilt University, Zachary Karas Vanderbilt University, Robert Wallace University of Notre Dame, Aakash Bansal Louisiana State University, Collin McMillan University of Notre Dame, Yu Huang Vanderbilt University | ||
12:00 10mTalk | LLM-Assisted Synthesis of High-Assurance C Programs Research Papers Prasita Mukherjee Purdue University, Minghai Lu Purdue University, Benjamin Delaware Purdue University Pre-print | ||
12:10 10mTalk | Faster Runtime Verification during Testing via Feedback-Guided Selective Monitoring Research Papers Shinhae Kim Cornell University, Saikat Dutta Cornell University, Owolabi Legunsen Cornell University | ||
12:20 10mTalk | Uncovering Discrimination Clusters: Quantifying and Explaining Systematic Fairness Violations Research Papers Ranit Debnath Akash University of Illinois Chicago, Ashish Kumar Pennsylvania State University, Verya Monjezi University of Texas at El Paso, Ashutosh Trivedi University of Colorado Boulder, Gang (Gary) Tan Pennsylvania State University, Saeid Tizpaz-Niari University of Illinois Chicago | ||