Stream-based runtime verification with hardware support
In this talk, we present a novel platform for online monitoring of multicore system. It gives insight to the system’s behavior without affecting it. This insight is crucial to detect non-deterministic failures as for example caused by race conditions and access to inconsistent data. A system-on-chip is observed using the tracing capabilities available on many modern multi-core processors. They provide highly compressed tracing information over a separate tracing port. From this information our system reconstructs the sequence of instructions executed by the processor, which can then be analyzed online by a reconfigurable monitoring unit. Analyses are described in a high-level temporal stream-based specification language, called TESSLA, that are compiled to configurations of the monitoring unit. To cope with the amount of tracing data generated by modern processors our system is implemented in hardware using an FPGA. The work presented is carried out within the COEMS project and has received funding from the European Union’s Horizon 2020 research and innovation program under grant agreement no. 732016.
Tue 17 Jul Times are displayed in time zone: (GMT+02:00) Amsterdam, Berlin, Bern, Rome, Stockholm, Vienna change
|11:00 - 11:45|
Martin LeuckerUniversity of Lübeck
|11:45 - 12:30|
Wolfgang AhrendtChalmers University of Technology