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ICSE 2023
Sun 14 - Sat 20 May 2023 Melbourne, Australia
Thu 18 May 2023 11:15 - 11:30 at Meeting Room 106 - Software verification Chair(s): Youcheng Sun

Symbolic execution is a powerful program analysis and testing technique. Symbolic execution engines are usually implemented as interpreters, and the induced interpretation overhead can dramatically inhibit performance. Alternatively, implementation choices based on instrumentation provide a limited ability to transform programs. However, the use of compilation and code generation techniques beyond simple instrumentation remains underexplored for engine construction, leaving potential performance gains untapped.

In this paper, we show how to tap some of these gains using sophisticated compilation techniques: We present GenSym, an optimizing symbolic-execution compiler that generates symbolic code which explores paths and generates tests in parallel. The key insight of GenSym is to compile symbolic execution tasks into cooperative concurrency via continuation-passing style, which further enables efficient parallelism. The design and implementation of GenSym is based on partial evaluation and generative programming techniques, which make it high-level and performant at the same time. We compare the performance of GenSym against the prior symbolic-execution compiler LLSC and the state-of-the-art symbolic interpreter KLEE. The results show an average 4.6x speedup for sequential execution and 9.4x speedup for parallel execution on 20 benchmark programs.

Thu 18 May

Displayed time zone: Hobart change

11:00 - 12:30
11:00
15m
Talk
Data-driven Recurrent Set Learning For Non-termination Analysis
Technical Track
Zhilei Han Tsinghua University, Fei He Tsinghua University
11:15
15m
Talk
Compiling Parallel Symbolic Execution with Continuations
Technical Track
Guannan Wei Purdue University, Songlin Jia Purdue University, Ruiqi Gao Purdue University, Haotian Deng Purdue University, Shangyin Tan UC Berkeley, Oliver Bračevac Purdue University, Tiark Rompf Purdue University
Pre-print
11:30
15m
Talk
Verifying Data Constraint Equivalence in FinTech Systems
Technical Track
Chengpeng Wang Hong Kong University of Science and Technology, Gang Fan Ant Group, Peisen Yao Zhejing University, Fuxiong Pan Ant Group, Charles Zhang Hong Kong University of Science and Technology
Pre-print
11:45
15m
Talk
Tolerate Control-Flow Changes for Sound Data Race Prediction
Technical Track
Shihao Zhu State Key Laboratory of Computer Science,Institute of Software,Chinese Academy of Sciences,China, Yuqi Guo Institute of Software, Chinese Academy of Sciences, Beijing, China, Long Zhang Institute of Software, Chinese Academy of Sciences, Yan Cai Institute of Software at Chinese Academy of Sciences
12:00
7m
Talk
TSVD4J: Thread-Safety Violation Detection for Java
DEMO - Demonstrations
Shanto Rahman University of Texas at Austin, Chengpeng Li University of Texas at Austin, August Shi University of Texas at Austin
12:07
7m
Talk
What Petri Nets Oblige Us to Say Comparing Approaches for Behavior Composition
Journal-First Papers
Achiya Elyasaf Ben-Gurion University of the Negev, Tom Yaacov Ben-Gurion University of the Negev, Gera Weiss Ben-Gurion University of the Negev
Link to publication DOI
12:15
7m
Talk
A Novel and Pragmatic Scenario Modeling Framework with Verification-in-the-loop for Autonomous Driving Systems
NIER - New Ideas and Emerging Results
Dehui Du East China Normal University, Bo Li East China Normal University, Chenghang Zheng East China Normal University