Simulink has become a pivotal tool in embedded scenarios, offering a model-driven approach for embedded software development. Given the tight performance and resource constraints in embedded applications, it is crucial to ensure the efficiency of the code generated from Simulink models. Code generators implement various optimizations to enhance performance. However, they neglect the potential of hardware-specific instructions available in modern processors, such as saturation-type instructions, which accomplish complex operations in fewer cycles. Moreover, relying on state-of-the-art compilers to use these instructions is also not as effective as expectation, due to their complex semantics.

This paper proposes AMICA, an efficient code generator for Simulink models with hardware-specific instruction synthesis. The key insight of AMICA is to leverage model semantics to effectively synthesize the appropriate instructions. AMICA first converts the model into the dataflow graph and crafts a series of optimization rules represented as dataflow subgraph with constraints related to block parameters, data types, and other critical properties. Then, AMICA iteratively matches these rules with dataflow graph to obtain the optimizable candidates. The candidate that maximizes latency reduction is chosen to update the dataflow graph. Finally, AMICA synthesizes the appropriate instructions for optimizable blocks in accordance with instruction syntax and block properties. We implemented and evaluated AMICA on benchmark Simulink models. Compared with the state-of-the-art code generators Simulink Embedded Coder and Mercury, the code generated by AMICA is 1.20$\times$ - 6.54$\times$ faster in terms of execution time across different platforms. Besides, AMICA reduces 6% - 53% assembly code size of the compiled programs, while performing similarly in terms of data segment size and BSS segment size.